From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 19601 invoked by alias); 14 Aug 2017 14:26:26 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 18872 invoked by uid 89); 14 Aug 2017 14:26:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.1 required=5.0 tests=BAYES_00,GIT_PATCH_2,GIT_PATCH_3,KAM_ASCII_DIVIDERS,RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 spammy=wales, Wales, HX-Envelope-From:sk:Sebasti, England X-HELO: relmlie1.idc.renesas.com Received: from relmlor2.renesas.com (HELO relmlie1.idc.renesas.com) (210.160.252.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 14 Aug 2017 14:25:59 +0000 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie1.idc.renesas.com with ESMTP; 14 Aug 2017 23:25:55 +0900 Received: from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com [10.200.68.65]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id EA8E366684 for ; Mon, 14 Aug 2017 23:25:54 +0900 (JST) Received: from mail-sg2apc01lp0240.outbound.protection.outlook.com (HELO APC01-SG2-obe.outbound.protection.outlook.com) ([65.55.88.240]) by relmlii1.idc.renesas.com with ESMTP/TLS/AES256-SHA256; 14 Aug 2017 23:25:54 +0900 Received: from HK2PR0601MB1828.apcprd06.prod.outlook.com (10.170.148.22) by HK2PR0601MB1828.apcprd06.prod.outlook.com (10.170.148.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.1341.21; Mon, 14 Aug 2017 14:25:52 +0000 Received: from HK2PR0601MB1828.apcprd06.prod.outlook.com ([fe80::cc1:c7dd:c87e:c734]) by HK2PR0601MB1828.apcprd06.prod.outlook.com ([fe80::cc1:c7dd:c87e:c734%18]) with mapi id 15.01.1341.020; Mon, 14 Aug 2017 14:25:52 +0000 From: Sebastian Perta To: "gcc-patches@gcc.gnu.org" Subject: [PATCH] rl78 adddi3 improvement Date: Mon, 14 Aug 2017 15:56:00 -0000 Message-ID: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Sebastian.Perta@renesas.com; x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;HK2PR0601MB1828;20:Y9p4+mnwc/IZ72OFcaoA868R3phZ3O2KxNzY45MlDyPZasg+50xa6y1eJIijga7VFiM/WtpyM/PdTI9Ba1MOIdYCyxvGfXRw1nXO6iBbRw03U/hLysefGOU+skxQTd/9XpHJZ1sat5vq0LUrOImDozxMijZrGX1Nb/QHBurmEv4= x-ms-exchange-antispam-srfa-diagnostics: SSOS; x-ms-office365-filtering-correlation-id: bfc0b1a9-4912-4c33-47f5-08d4e3205e64 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(2017030254152)(48565401081)(300000503095)(300135400095)(2017052603031)(201703131423075)(201703031133081)(201702281549075)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);SRVR:HK2PR0601MB1828; x-ms-traffictypediagnostic: HK2PR0601MB1828: x-exchange-antispam-report-test: UriScan:(250305191791016)(180628864354917)(22074186197030); x-microsoft-antispam-prvs: x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(601004)(2401047)(5005006)(8121501046)(100000703101)(100105400095)(93006095)(93001095)(10201501046)(3002001)(6055026)(6041248)(20161123558100)(20161123560025)(20161123562025)(20161123555025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123564025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);SRVR:HK2PR0601MB1828;BCL:0;PCL:0;RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);SRVR:HK2PR0601MB1828; x-forefront-prvs: 039975700A x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(6009001)(39860400002)(199003)(377424004)(189002)(54534003)(101416001)(50986999)(54356999)(66066001)(9686003)(33656002)(5640700003)(110136004)(106356001)(97736004)(2900100001)(53936002)(99286003)(189998001)(2351001)(6306002)(55016002)(72206003)(86362001)(105586002)(14454004)(25786009)(68736007)(478600001)(2906002)(6506006)(8936002)(6436002)(3280700002)(81156014)(3660700001)(2501003)(6916009)(7696004)(81166006)(74316002)(5250100002)(7736002)(6116002)(102836003)(3846002)(5660300001)(305945005)(8676002)(2004002);DIR:OUT;SFP:1102;SCL:1;SRVR:HK2PR0601MB1828;H:HK2PR0601MB1828.apcprd06.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;A:1;MX:1;LANG:en; received-spf: None (protection.outlook.com: renesas.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Aug 2017 14:25:52.6921 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-Transport-CrossTenantHeadersStamped: HK2PR0601MB1828 X-SW-Source: 2017-08/txt/msg00878.txt.bz2 The following patch improves both the speed and code size for 64 bit additi= on for RL78: it emits a library function call instead of emitting code for the 64 bit a= dd for every single addition. The addition function which was added in libgcc is hand written, so more op= timal than what GCC generates. The change can easily be seen on the following test case. long long my_adddi3(long long a, long long b) { return a + b; } I did not add this to the regression as it very simple and there are many t= est cases in the regression which test this, for example gcc.c-torture/execute/20090711-1.c and gcc.c-torture/execute/20091229-1.c = and so on. Regression test is OK, tested with the following command: make -k check-gcc RUNTESTFLAGS=3D--target_board=3Drl78-sim Please let me know if this is OK, Thank you! Sebastian Index: gcc/ChangeLog =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- gcc/ChangeLog(revision 251091) +++ gcc/ChangeLog(working copy) @@ -1,3 +1,12 @@ +2017-08-14 Sebastian Perta + +changed long long addition for RL78 +* gcc/config/rl78/rl78.c (rl78_emit_libcall): new function. +* gcc/config/rl78/rl78-protos.h (rl78_emit_libcall): new function. +* gcc/config/rl78/rl78.md: new define_expand "adddi3". +* libgcc/config/rl78/adddi3.S: new assembly file. +* libgcc/config/rl78/t-rl78: added adddi3.S to LIB2ADD. + 2017-08-14 Bin Cheng PR tree-optimization/81799 Index: gcc/config/rl78/rl78-protos.h =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- gcc/config/rl78/rl78-protos.h(revision 251091) +++ gcc/config/rl78/rl78-protos.h(working copy) @@ -56,3 +56,13 @@ int, int, int); intrl78_one_far_p (rtx *operands, int num_operands); + +#ifdef RTX_CODE +#ifdef HAVE_MACHINE_MODES + +rtx rl78_emit_libcall (const char*, enum rtx_code, + enum machine_mode, enum machine_mode, + int, rtx*); + +#endif +#endif Index: gcc/config/rl78/rl78.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- gcc/config/rl78/rl78.c(revision 251091) +++ gcc/config/rl78/rl78.c(working copy) @@ -4791,4 +4791,43 @@ struct gcc_target targetm =3D TARGET_INITIALIZER; +rtx +rl78_emit_libcall (const char *name, enum rtx_code code, + enum machine_mode dmode, enum machine_mode smode, + int noperands, rtx *operands) +{ + rtx ret; + rtx_insn *insns; + rtx libcall; + rtx equiv; + + start_sequence (); + libcall =3D gen_rtx_SYMBOL_REF (Pmode, name); + + switch (noperands) + { + case 2: + ret =3D emit_library_call_value (libcall, NULL_RTX, LCT_CONST, + dmode, 1, operands[1], smode); + equiv =3D gen_rtx_fmt_e (code, dmode, operands[1]); + break; + + case 3: + ret =3D emit_library_call_value (libcall, NULL_RTX, + LCT_CONST, dmode, 2, + operands[1], smode, operands[2], + smode); + equiv =3D gen_rtx_fmt_ee (code, dmode, operands[1], operands[2]); + break; + + default: + gcc_unreachable (); + } + + insns =3D get_insns (); + end_sequence (); + emit_libcall_block (insns, operands[0], ret, equiv); + return ret; +} + #include "gt-rl78.h" Index: gcc/config/rl78/rl78.md =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- gcc/config/rl78/rl78.md(revision 251091) +++ gcc/config/rl78/rl78.md(working copy) @@ -224,6 +224,16 @@ DONE;" ) +(define_expand "adddi3" + [(set (match_operand:DI 0 "nonimmediate_operand" "") + (plus:DI (match_operand:DI 1 "general_operand" "") + (match_operand:DI 2 "general_operand" ""))) + ] + "" + "rl78_emit_libcall (\"__adddi3\", PLUS, DImode, DImode, 3, operands); + DONE;" +) + (define_insn "addsi3_internal_virt" [(set (match_operand:SI 0 "nonimmediate_operand" "=3Dv,&vm, vm") (plus:SI (match_operand:SI 1 "general_operand" "0, vim, vim") Index: libgcc/config/rl78/adddi3.S =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- libgcc/config/rl78/adddi3.S(nonexistent) +++ libgcc/config/rl78/adddi3.S(working copy) @@ -0,0 +1,58 @@ +; Copyright (C) 2017 Free Software Foundation, Inc. +; Contributed by Sebastian Perta. +; +; This file is free software; you can redistribute it and/or modify it +; under the terms of the GNU General Public License as published by the +; Free Software Foundation; either version 3, or (at your option) any +; later version. +; +; This file is distributed in the hope that it will be useful, but +; WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; General Public License for more details. +; +; Under Section 7 of GPL version 3, you are granted additional +; permissions described in the GCC Runtime Library Exception, version +; 3.1, as published by the Free Software Foundation. +; +; You should have received a copy of the GNU General Public License and +; a copy of the GCC Runtime Library Exception along with this program; +; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +; . + + +#include "vregs.h" + + .text + +START_FUNC ___adddi3 + + movw hl, sp ; use HL-based addressing (allows for direct addw) + + movw ax, [hl+4] + addw ax, [hl+12] + movw r8, ax + + mov a, [hl+6] ; middle bytes of the result are determined using 8= -bit + addc a, [hl+14] ; ADDC insns which both account for and update the = carry bit + mov r10, a ; (no ADDWC instruction is available) + mov a, [hl+7] + addc a, [hl+15] + mov r11, a + + mov a, [hl+8] + addc a, [hl+16] + mov r12, a + mov a, [hl+9] + addc a, [hl+17] + mov r13, a + + movw ax, [hl+10] + sknc ; account for the possible carry from the + incw ax ; latest 8-bit operation + addw ax, [hl+18] + movw r14, ax + + ret + +END_FUNC ___adddi3 Index: libgcc/config/rl78/t-rl78 =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- libgcc/config/rl78/t-rl78(revision 251091) +++ libgcc/config/rl78/t-rl78(working copy) @@ -30,7 +30,8 @@ $(srcdir)/config/rl78/bit-count.S \ $(srcdir)/config/rl78/fpbit-sf.S \ $(srcdir)/config/rl78/fpmath-sf.S \ -$(srcdir)/config/rl78/cmpsi2.S +$(srcdir)/config/rl78/cmpsi2.S \ +$(srcdir)/config/rl78/adddi3.S LIB2FUNCS_EXCLUDE =3D _clzhi2 _clzsi2 _ctzhi2 _ctzsi2 \ _popcounthi2 _popcountsi2 \ Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, B= uckinghamshire, SL8 5FH, UK. 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