From: Kaushik Phatak <Kaushik.Phatak@kpit.com>
To: "'gcc-patches@gcc.gnu.org'" <gcc-patches@gcc.gnu.org>
Cc: "nick clifton (nickc@redhat.com)" <nickc@redhat.com>
Subject: [PATCH : RL78] Disable interrupts during hardware multiplication routines
Date: Fri, 05 Jun 2015 06:44:00 -0000 [thread overview]
Message-ID: <HKXPR03MB08064371B4EA243BB847C833FCB20@HKXPR03MB0806.apcprd03.prod.outlook.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 3227 bytes --]
Hi,
Please find attached a patch which disables interrupts during inline hardware multiplication routines.
These routines use up several control registers which are not saved/restored in interrupt routines.
This causes corruption of result in case multiplication/division registers are used in main code as well as interrupts.
This patch has been regression tested with simulator as well as hardware.
Please review the same and let me know if OK to commit?
Best Regards,
Kaushik Phatak
2015-06-05 Kaushik Phatak <kaushik.phatak@kpit.com>
* config/rl78/rl78.md (mulhi3_g13): Disable interrupts in
routine.
(mulsi3_g14): Likewise.
(mulsi3_g13): Likewise.
(udivmodsi4_g13): Likewise.
Index: gcc/config/rl78/rl78.md
===================================================================
--- gcc/config/rl78/rl78.md (revision 224145)
+++ gcc/config/rl78/rl78.md (working copy)
@@ -372,6 +372,7 @@
]
"RL78_MUL_G13"
"; G13 mulhi macro %0 = %1 * %2
+ di
mov a, #0x00
mov !0xf00e8, a ; MDUC
movw ax, %h1
@@ -381,6 +382,7 @@
nop ; mdb = mdal * mdah
movw ax, 0xffff6 ; MDBL
movw %h0, ax
+ ei
; end of mulhi macro"
[(set_attr "valloc" "macax")]
)
@@ -397,6 +399,7 @@
]
"RL78_MUL_G14"
"; G14 mulsi macro %0 = %1 * %2
+ di
movw ax, %h1
movw bc, %h2
MULHU ; bcax = bc * ax
@@ -411,6 +414,7 @@
MACHU ; MACR += bc * ax
movw ax, 0xffff0
movw %H0, ax
+ ei
; end of mulsi macro"
[(set_attr "valloc" "macax")]
)
@@ -429,6 +433,7 @@
]
"RL78_MUL_G13"
"; G13 mulsi macro %0 = %1 * %2
+ di
mov a, #0x00
mov !0xf00e8, a ; MDUC
movw ax, %h1
@@ -461,6 +466,7 @@
nop ; Additional nop for MAC
movw ax, !0xf00e0 ; MDCL
movw %H0, ax
+ ei
; end of mulsi macro"
[(set_attr "valloc" "macax")]
)
@@ -629,6 +635,7 @@
{
if (find_reg_note (insn, REG_UNUSED, operands[3]))
return "; G13 udivsi macro %0 = %1 / %2 \n\
+ di \n\
mov a, #0xC0 ; Set DIVMODE=1 and MACMODE=1 \n\
mov !0xf00e8, a ; This preps the peripheral for division without interrupt generation \n\
movw ax, %H1 \n\
@@ -647,9 +654,11 @@
movw %h0, ax \n\
movw ax, 0xffff2 \n\
movw %H0, ax \n\
+ ei \n\
; end of udivsi macro";
else if (find_reg_note (insn, REG_UNUSED, operands[0]))
return "; G13 umodsi macro %3 = %1 %% %2 \n\
+ di \n\
mov a, #0xC0 ; Set DIVMODE=1 and MACMODE=1 \n\
mov !0xf00e8, a ; This preps the peripheral for division without interrupt generation \n\
movw ax, %H1 \n\
@@ -668,9 +677,11 @@
movw %h3, ax \n\
movw ax, !0xf00e2 \n\
movw %H3, ax \n\
+ ei \n\
; end of umodsi macro";
else
return "; G13 udivmodsi macro %0 = %1 / %2 and %3 = %1 %% %2 \n\
+ di \n\
mov a, #0xC0 ; Set DIVMODE=1 and MACMODE=1 \n\
mov !0xf00e8, a ; This preps the peripheral for division without interrupt generation \n\
movw ax, %H1 \n\
@@ -693,6 +704,7 @@
movw %h3, ax \n\
movw ax, !0xf00e2 \n\
movw %H3, ax \n\
+ ei \n\
; end of udivmodsi macro";
}
[(set_attr "valloc" "macax")]
/* End of Patch */
Best Regards,
Kaushik Phatak
[-- Attachment #2: rl78_mul_div.diff --]
[-- Type: application/octet-stream, Size: 2338 bytes --]
Index: gcc/config/rl78/rl78.md
===================================================================
--- gcc/config/rl78/rl78.md (revision 224145)
+++ gcc/config/rl78/rl78.md (working copy)
@@ -372,6 +372,7 @@
]
"RL78_MUL_G13"
"; G13 mulhi macro %0 = %1 * %2
+ di
mov a, #0x00
mov !0xf00e8, a ; MDUC
movw ax, %h1
@@ -381,6 +382,7 @@
nop ; mdb = mdal * mdah
movw ax, 0xffff6 ; MDBL
movw %h0, ax
+ ei
; end of mulhi macro"
[(set_attr "valloc" "macax")]
)
@@ -397,6 +399,7 @@
]
"RL78_MUL_G14"
"; G14 mulsi macro %0 = %1 * %2
+ di
movw ax, %h1
movw bc, %h2
MULHU ; bcax = bc * ax
@@ -411,6 +414,7 @@
MACHU ; MACR += bc * ax
movw ax, 0xffff0
movw %H0, ax
+ ei
; end of mulsi macro"
[(set_attr "valloc" "macax")]
)
@@ -429,6 +433,7 @@
]
"RL78_MUL_G13"
"; G13 mulsi macro %0 = %1 * %2
+ di
mov a, #0x00
mov !0xf00e8, a ; MDUC
movw ax, %h1
@@ -461,6 +466,7 @@
nop ; Additional nop for MAC
movw ax, !0xf00e0 ; MDCL
movw %H0, ax
+ ei
; end of mulsi macro"
[(set_attr "valloc" "macax")]
)
@@ -629,6 +635,7 @@
{
if (find_reg_note (insn, REG_UNUSED, operands[3]))
return "; G13 udivsi macro %0 = %1 / %2 \n\
+ di \n\
mov a, #0xC0 ; Set DIVMODE=1 and MACMODE=1 \n\
mov !0xf00e8, a ; This preps the peripheral for division without interrupt generation \n\
movw ax, %H1 \n\
@@ -647,9 +654,11 @@
movw %h0, ax \n\
movw ax, 0xffff2 \n\
movw %H0, ax \n\
+ ei \n\
; end of udivsi macro";
else if (find_reg_note (insn, REG_UNUSED, operands[0]))
return "; G13 umodsi macro %3 = %1 %% %2 \n\
+ di \n\
mov a, #0xC0 ; Set DIVMODE=1 and MACMODE=1 \n\
mov !0xf00e8, a ; This preps the peripheral for division without interrupt generation \n\
movw ax, %H1 \n\
@@ -668,9 +677,11 @@
movw %h3, ax \n\
movw ax, !0xf00e2 \n\
movw %H3, ax \n\
+ ei \n\
; end of umodsi macro";
else
return "; G13 udivmodsi macro %0 = %1 / %2 and %3 = %1 %% %2 \n\
+ di \n\
mov a, #0xC0 ; Set DIVMODE=1 and MACMODE=1 \n\
mov !0xf00e8, a ; This preps the peripheral for division without interrupt generation \n\
movw ax, %H1 \n\
@@ -693,6 +704,7 @@
movw %h3, ax \n\
movw ax, !0xf00e2 \n\
movw %H3, ax \n\
+ ei \n\
; end of udivmodsi macro";
}
[(set_attr "valloc" "macax")]
next reply other threads:[~2015-06-05 6:37 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-05 6:44 Kaushik Phatak [this message]
2015-06-05 8:02 ` DJ Delorie
2015-08-27 13:14 ` Kaushik Phatak
2015-08-27 17:11 ` Mike Stump
2015-08-27 17:25 ` DJ Delorie
2015-12-07 12:36 ` Kaushik Phatak
[not found] <CAJA2CV1y0Mk20KqgFbdFs19tyPCH7HvR_XGAwy=OyhYcgNLuWQ@mail.gmail.com>
[not found] ` <C6735D72-E033-470D-A8B2-1949D7A04AEE@comcast.net>
2016-01-07 11:27 ` Kaushik M Phatak
2016-01-07 12:03 ` Nick Clifton
2016-01-12 7:21 Kaushik M Phatak
2016-01-12 12:20 ` Nick Clifton
2016-01-12 15:54 ` Mike Stump
2016-05-04 11:47 ` Kaushik Phatak
2016-05-09 11:46 ` Nick Clifton
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