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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR01MB7835.prod.exchangelabs.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8daef0c9-fe53-4c72-ee0c-08db936ffd0c X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Aug 2023 15:48:59.9079 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: O3A78zwY2DT2S86BFL+h/1ii139arZf08rRgYax88DamysZUc6dEsaIT+XpuyfWKwpxsf0OHNd6M0vjuapwV6f5uckuWUITqOG5gNRAeDyk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY3PR01MB6580 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch extends option -mbranch-protection=3Dbti with an optional argume= nt=0A= as bti[+all] to force compiler to unconditionally insert bti for all=0A= functions. Because a direct function call at the stage of compiling might b= e=0A= rewritten to an indirect call with some kind of linker-generated thunk stub= =0A= as invocation relay for some reasons. One instance is if a direct callee is= =0A= placed far from its caller, direct BL {imm} instruction could not represent= =0A= the distance, so indirect BLR {reg} should be used. For this case, a bti is= =0A= required at the beginning of the callee.=0A= =0A= caller() {=0A= bl callee=0A= }=0A= =0A= =3D>=0A= =0A= caller() {=0A= adrp reg, =0A= add reg, reg, #constant=0A= blr reg=0A= }=0A= =0A= Although the issue could be fixed with a pretty new version of ld, here we= =0A= provide another means for user who has to rely on the old ld or other non-l= d=0A= linker. I also checked LLVM, by default, it implements bti just as the prop= osed=0A= -mbranch-protection=3Dbti+all.=0A= =0A= Feng=0A= =0A= ---=0A= gcc/config/aarch64/aarch64.cc | 12 +++++++-----=0A= gcc/config/aarch64/aarch64.opt | 2 +-=0A= gcc/config/arm/aarch-bti-insert.cc | 3 ++-=0A= gcc/config/arm/aarch-common.cc | 22 ++++++++++++++++++----=0A= gcc/config/arm/aarch-common.h | 18 ++++++++++++++++++=0A= gcc/config/arm/arm.cc | 4 ++--=0A= gcc/config/arm/arm.opt | 2 +-=0A= gcc/doc/invoke.texi | 16 ++++++++++------=0A= gcc/testsuite/gcc.target/aarch64/bti-5.c | 17 +++++++++++++++++=0A= 9 files changed, 76 insertions(+), 20 deletions(-)=0A= create mode 100644 gcc/testsuite/gcc.target/aarch64/bti-5.c=0A= =0A= diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc= =0A= index 71215ef9fee..a404447c8d0 100644=0A= --- a/gcc/config/aarch64/aarch64.cc=0A= +++ b/gcc/config/aarch64/aarch64.cc=0A= @@ -8997,7 +8997,8 @@ void aarch_bti_arch_check (void)=0A= bool=0A= aarch_bti_enabled (void)=0A= {=0A= - return (aarch_enable_bti =3D=3D 1);=0A= + gcc_checking_assert (aarch_enable_bti !=3D AARCH_BTI_FUNCTION_UNSET);=0A= + return (aarch_enable_bti !=3D AARCH_BTI_FUNCTION_NONE);=0A= }=0A= =0A= /* Check if INSN is a BTI J insn. */=0A= @@ -18454,12 +18455,12 @@ aarch64_override_options (void)=0A= =0A= selected_tune =3D tune ? tune->ident : cpu->ident;=0A= =0A= - if (aarch_enable_bti =3D=3D 2)=0A= + if (aarch_enable_bti =3D=3D AARCH_BTI_FUNCTION_UNSET)=0A= {=0A= #ifdef TARGET_ENABLE_BTI=0A= - aarch_enable_bti =3D 1;=0A= + aarch_enable_bti =3D AARCH_BTI_FUNCTION;=0A= #else=0A= - aarch_enable_bti =3D 0;=0A= + aarch_enable_bti =3D AARCH_BTI_FUNCTION_NONE;=0A= #endif=0A= }=0A= =0A= @@ -22881,7 +22882,8 @@ aarch64_print_patchable_function_entry (FILE *file,= =0A= basic_block bb =3D ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb;=0A= =0A= if (!aarch_bti_enabled ()=0A= - || cgraph_node::get (cfun->decl)->only_called_directly_p ())=0A= + || (aarch_enable_bti !=3D AARCH_BTI_FUNCTION_ALL=0A= + && cgraph_node::get (cfun->decl)->only_called_directly_p ()))=0A= {=0A= /* Emit the patchable_area at the beginning of the function. */=0A= rtx_insn *insn =3D emit_insn_before (pa, BB_HEAD (bb));=0A= diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.op= t=0A= index 025e52d40e5..5571f7e916d 100644=0A= --- a/gcc/config/aarch64/aarch64.opt=0A= +++ b/gcc/config/aarch64/aarch64.opt=0A= @@ -37,7 +37,7 @@ TargetVariable=0A= aarch64_feature_flags aarch64_isa_flags =3D 0=0A= =0A= TargetVariable=0A= -unsigned aarch_enable_bti =3D 2=0A= +enum aarch_bti_function_type aarch_enable_bti =3D AARCH_BTI_FUNCTION_UNSET= =0A= =0A= TargetVariable=0A= enum aarch_key_type aarch_ra_sign_key =3D AARCH_KEY_A=0A= diff --git a/gcc/config/arm/aarch-bti-insert.cc b/gcc/config/arm/aarch-bti-= insert.cc=0A= index 71a77e29406..babd2490c9f 100644=0A= --- a/gcc/config/arm/aarch-bti-insert.cc=0A= +++ b/gcc/config/arm/aarch-bti-insert.cc=0A= @@ -164,7 +164,8 @@ rest_of_insert_bti (void)=0A= functions that are already protected by Return Address Signing (PACIA= SP/=0A= PACIBSP). For all other cases insert a BTI C at the beginning of the= =0A= function. */=0A= - if (!cgraph_node::get (cfun->decl)->only_called_directly_p ())=0A= + if (aarch_enable_bti =3D=3D AARCH_BTI_FUNCTION_ALL=0A= + || !cgraph_node::get (cfun->decl)->only_called_directly_p ())=0A= {=0A= bb =3D ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb;=0A= insn =3D BB_HEAD (bb);=0A= diff --git a/gcc/config/arm/aarch-common.cc b/gcc/config/arm/aarch-common.c= c=0A= index 5b96ff4c2e8..7751d40f909 100644=0A= --- a/gcc/config/arm/aarch-common.cc=0A= +++ b/gcc/config/arm/aarch-common.cc=0A= @@ -666,7 +666,7 @@ static enum aarch_parse_opt_result=0A= aarch_handle_no_branch_protection (char* str, char* rest)=0A= {=0A= aarch_ra_sign_scope =3D AARCH_FUNCTION_NONE;=0A= - aarch_enable_bti =3D 0;=0A= + aarch_enable_bti =3D AARCH_BTI_FUNCTION_NONE;=0A= if (rest)=0A= {=0A= error ("unexpected %<%s%> after %<%s%>", rest, str);=0A= @@ -680,7 +680,7 @@ aarch_handle_standard_branch_protection (char* str, cha= r* rest)=0A= {=0A= aarch_ra_sign_scope =3D AARCH_FUNCTION_NON_LEAF;=0A= aarch_ra_sign_key =3D AARCH_KEY_A;=0A= - aarch_enable_bti =3D 1;=0A= + aarch_enable_bti =3D AARCH_BTI_FUNCTION;=0A= if (rest)=0A= {=0A= error ("unexpected %<%s%> after %<%s%>", rest, str);=0A= @@ -718,7 +718,15 @@ static enum aarch_parse_opt_result=0A= aarch_handle_bti_protection (char* str ATTRIBUTE_UNUSED,=0A= char* rest ATTRIBUTE_UNUSED)=0A= {=0A= - aarch_enable_bti =3D 1;=0A= + aarch_enable_bti =3D AARCH_BTI_FUNCTION;=0A= + return AARCH_PARSE_OK;=0A= +}=0A= +=0A= +static enum aarch_parse_opt_result=0A= +aarch_handle_bti_all (char* str ATTRIBUTE_UNUSED,=0A= + char* rest ATTRIBUTE_UNUSED)=0A= +{=0A= + aarch_enable_bti =3D AARCH_BTI_FUNCTION_ALL;=0A= return AARCH_PARSE_OK;=0A= }=0A= =0A= @@ -728,12 +736,18 @@ static const struct aarch_branch_protect_type aarch_p= ac_ret_subtypes[] =3D {=0A= { NULL, NULL, NULL, 0 }=0A= };=0A= =0A= +static const struct aarch_branch_protect_type aarch_bti_subtypes[] =3D {= =0A= + { "all", aarch_handle_bti_all, NULL, 0 },=0A= + { NULL, NULL, NULL, 0 }=0A= +};=0A= +=0A= static const struct aarch_branch_protect_type aarch_branch_protect_types[]= =3D {=0A= { "none", aarch_handle_no_branch_protection, NULL, 0 },=0A= { "standard", aarch_handle_standard_branch_protection, NULL, 0 },=0A= { "pac-ret", aarch_handle_pac_ret_protection, aarch_pac_ret_subtypes,=0A= ARRAY_SIZE (aarch_pac_ret_subtypes) },=0A= - { "bti", aarch_handle_bti_protection, NULL, 0 },=0A= + { "bti", aarch_handle_bti_protection, aarch_bti_subtypes,=0A= + ARRAY_SIZE (aarch_bti_subtypes) },=0A= { NULL, NULL, NULL, 0 }=0A= };=0A= =0A= diff --git a/gcc/config/arm/aarch-common.h b/gcc/config/arm/aarch-common.h= =0A= index c6a67f0d05c..c90b9120102 100644=0A= --- a/gcc/config/arm/aarch-common.h=0A= +++ b/gcc/config/arm/aarch-common.h=0A= @@ -50,6 +50,24 @@ enum aarch_key_type {=0A= AARCH_KEY_B=0A= };=0A= =0A= +/* Function types to insert bti. */=0A= +enum aarch_bti_function_type {=0A= + AARCH_BTI_FUNCTION_UNSET =3D -1u,=0A= + /* Don't add bti to any function. */=0A= + AARCH_BTI_FUNCTION_NONE =3D 0,=0A= + /* Add bti to function that may be indirect call target. The judgement i= s=0A= + only made based on the information that compiler could get. However,= =0A= + at linking stage, a direct call might be rewritten to indirect call w= ith=0A= + some kind of linker-generated thunk stub as invocation relay for some= =0A= + reasons. One instance is if a direct callee is placed far from its= =0A= + caller, direct branch instruction could not represent the distance.= =0A= + For this case that have to rely on linker decision, bti would not be= =0A= + added. */=0A= + AARCH_BTI_FUNCTION,=0A= + /* Add bti to all functions. */=0A= + AARCH_BTI_FUNCTION_ALL=0A= +};=0A= +=0A= struct aarch_branch_protect_type=0A= {=0A= /* The type's name that the user passes to the branch-protection option= =0A= diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc=0A= index c3e731b8982..3b643438195 100644=0A= --- a/gcc/config/arm/arm.cc=0A= +++ b/gcc/config/arm/arm.cc=0A= @@ -28616,7 +28616,7 @@ arm_file_start (void)=0A= {=0A= int val;=0A= bool pac =3D (aarch_ra_sign_scope !=3D AARCH_FUNCTION_NONE);=0A= - bool bti =3D (aarch_enable_bti =3D=3D 1);=0A= + bool bti =3D (aarch_enable_bti !=3D AARCH_BTI_FUNCTION_NONE);=0A= =0A= arm_print_asm_arch_directives=0A= (asm_out_file, TREE_TARGET_OPTION (target_option_default_node));=0A= @@ -33238,7 +33238,7 @@ void aarch_bti_arch_check (void)=0A= bool=0A= aarch_bti_enabled (void)=0A= {=0A= - return aarch_enable_bti !=3D 0;=0A= + return aarch_enable_bti !=3D AARCH_BTI_FUNCTION_NONE;=0A= }=0A= =0A= /* Check if INSN is a BTI J insn. */=0A= diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt=0A= index 3a49b51ece0..11b987e5891 100644=0A= --- a/gcc/config/arm/arm.opt=0A= +++ b/gcc/config/arm/arm.opt=0A= @@ -28,7 +28,7 @@ TargetVariable=0A= enum aarch_function_type aarch_ra_sign_scope =3D AARCH_FUNCTION_NONE=0A= =0A= TargetVariable=0A= -unsigned aarch_enable_bti =3D 0=0A= +enum aarch_bti_function_type aarch_enable_bti =3D AARCH_BTI_FUNCTION_NONE= =0A= =0A= TargetVariable=0A= enum aarch_key_type aarch_ra_sign_key =3D AARCH_KEY_A=0A= diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi=0A= index 875d1d08b16..87afd411c56 100644=0A= --- a/gcc/doc/invoke.texi=0A= +++ b/gcc/doc/invoke.texi=0A= @@ -778,7 +778,7 @@ Objective-C and Objective-C++ Dialects}.=0A= -mpc-relative-literal-loads=0A= -msign-return-address=3D@var{scope}=0A= -mbranch-protection=3D@var{none}|@var{standard}|@var{pac-ret}[+@var{leaf}= =0A= -+@var{b-key}]|@var{bti}=0A= ++@var{b-key}]|@var{bti}[+@var{all}]=0A= -mharden-sls=3D@var{opts}=0A= -march=3D@var{name} -mcpu=3D@var{name} -mtune=3D@var{name}=0A= -moverride=3D@var{string} -mverbose-cost-dump=0A= @@ -858,7 +858,7 @@ Objective-C and Objective-C++ Dialects}.=0A= -mstack-protector-guard=3D@var{guard} -mstack-protector-guard-offset=3D@va= r{offset}=0A= -mfdpic=0A= -mbranch-protection=3D@var{none}|@var{standard}|@var{pac-ret}[+@var{leaf}]= =0A= -[+@var{bti}]|@var{bti}[+@var{pac-ret}[+@var{leaf}]]}=0A= +[+@var{bti}[+@var{all}]]|@var{bti}[+@var{all}][+@var{pac-ret}[+@var{leaf}]= ]}=0A= =0A= @emph{AVR Options}=0A= @gccoptlist{-mmcu=3D@var{mcu} -mabsdata -maccumulate-args=0A= @@ -20560,7 +20560,7 @@ default value is @samp{none}. This option has been = deprecated by=0A= -mbranch-protection.=0A= =0A= @opindex mbranch-protection=0A= -@item -mbranch-protection=3D@var{none}|@var{standard}|@var{pac-ret}[+@var{= leaf}+@var{b-key}]|@var{bti}=0A= +@item -mbranch-protection=3D@var{none}|@var{standard}|@var{pac-ret}[+@var{= leaf}+@var{b-key}]|@var{bti}[+@var{all}]=0A= Select the branch protection features to use.=0A= @samp{none} is the default and turns off all types of branch protection.= =0A= @samp{standard} turns on all types of branch protection features. If a fe= ature=0A= @@ -20572,7 +20572,10 @@ functions will practically always do this) using t= he a-key. The optional=0A= argument @samp{leaf} can be used to extend the signing to include leaf=0A= functions. The optional argument @samp{b-key} can be used to sign the fun= ctions=0A= with the B-key instead of the A-key.=0A= -@samp{bti} turns on branch target identification mechanism.=0A= +@samp{bti}[+@var{all}] turns on branch target identification mechanism. If= =0A= +the optional argument @samp{all} is specified, bti-c instruction will be= =0A= +unconditionally added to the beginning of all functions, otherwise, only= =0A= +added to function that is supposed to be indirect call target by compiler.= =0A= =0A= @opindex mharden-sls=0A= @item -mharden-sls=3D@var{opts}=0A= @@ -22836,7 +22839,7 @@ build the Linux kernel using the same (@code{arm-*-= uclinuxfdpiceabi})=0A= toolchain as the one used to build the userland programs.=0A= =0A= @opindex mbranch-protection=0A= -@item -mbranch-protection=3D@var{none}|@var{standard}|@var{pac-ret}[+@var{= leaf}][+@var{bti}]|@var{bti}[+@var{pac-ret}[+@var{leaf}]]=0A= +@item -mbranch-protection=3D@var{none}|@var{standard}|@var{pac-ret}[+@var{= leaf}][+@var{bti}[+@var{all}]]|@var{bti}[+@var{all}][+@var{pac-ret}[+@var{l= eaf}]]=0A= Enable branch protection features (armv8.1-m.main only).=0A= @samp{none} generate code without branch protection or return address=0A= signing.=0A= @@ -22848,7 +22851,8 @@ the return address to memory.=0A= @samp{leaf} When return address signing is enabled, also sign leaf=0A= functions even if they do not write the return address to memory.=0A= +@samp{bti} Add landing-pad instructions at the permitted targets of=0A= -indirect branch instructions.=0A= +indirect branch instructions. If the optional argument @samp{all} is=0A= +specified, the instruction will be unconditionally added to all functions.= =0A= =0A= If the @samp{+pacbti} architecture extension is not enabled, then all=0A= branch protection and return address signing operations are=0A= diff --git a/gcc/testsuite/gcc.target/aarch64/bti-5.c b/gcc/testsuite/gcc.t= arget/aarch64/bti-5.c=0A= new file mode 100644=0A= index 00000000000..654cd0cce7e=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/aarch64/bti-5.c=0A= @@ -0,0 +1,17 @@=0A= +/* { dg-do run } */=0A= +/* { dg-options "-O1 -save-temps" } */=0A= +/* { dg-require-effective-target lp64 } */=0A= +/* { dg-additional-options "-mbranch-protection=3Dbti+all" { target { ! de= fault_branch_protection } } } */=0A= +=0A= +static int __attribute__((noinline))=0A= +func(int w) {=0A= + return 37;=0A= +}=0A= +=0A= +int __attribute__((section(".main.text")))=0A= +main(int argc, char **argv)=0A= +{=0A= + return func(argc) =3D=3D 37 ? 0 : 1;=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler-times "hint\t34" 2 } } */=0A= -- =0A= 2.17.1=