RE: Re: [PATCH] RISC-V: Add vectorized strcmp.

["Li, Pan2" <pan2.li@intel.com>]

[-- Attachment #1: Type: text/plain, Size: 2651 bytes --]

FYI. I have the some failures as juzhe mentioned, with the emulator qemu version qemu-riscv64 version 8.1.93 (v8.2.0-rc3). The entire log may look like below:

Executing on host: /home/box/panli/riscv-gnu-toolchain/build-gcc-newlib-stage2/gcc/xgcc -B/home/box/panli/riscv-gnu-toolchain/build-gcc-newlib-stage2/gcc/  /home/box/panli/riscv-gnu-toolchain/gcc/gcc/testsuite/gcc.target/riscv/rvv/autovec/builtin/strcmp-run.c  -march=rv64gcv -mabi=lp64d -mcmodel=medlow --param=riscv-autovec-lmul=m1 --param=riscv-autovec-preference=fixed-vlmax   -fdiagnostics-plain-output   -ftree-vectorize -O3 --param riscv-autovec-lmul=m1 -O3 -minline-strcmp       -lm  -o ./strcmp-run.exe    (timeout = 600)
spawn -ignore SIGHUP /home/box/panli/riscv-gnu-toolchain/build-gcc-newlib-stage2/gcc/xgcc -B/home/box/panli/riscv-gnu-toolchain/build-gcc-newlib-stage2/gcc/ /home/box/panli/riscv-gnu-toolchain/gcc/gcc/testsuite/gcc.target/riscv/rvv/autovec/builtin/strcmp-run.c -march=rv64gcv -mabi=lp64d -mcmodel=medlow --param=riscv-autovec-lmul=m1 --param=riscv-autovec-preference=fixed-vlmax -fdiagnostics-plain-output -ftree-vectorize -O3 --param riscv-autovec-lmul=m1 -O3 -minline-strcmp -lm -o ./strcmp-run.exe^M
PASS: gcc.target/riscv/rvv/autovec/builtin/strcmp-run.c (test for excess errors)
spawn riscv64-unknown-elf-run ./strcmp-run.exe^M
qemu-riscv64: warning: CPU property 'Zve32f' is deprecated. Please use 'zve32f' instead^M
qemu-riscv64: warning: CPU property 'Zve64f' is deprecated. Please use 'zve64f' instead^M
FAIL: gcc.target/riscv/rvv/autovec/builtin/strcmp-run.c execution test

Pan

From: 钟居哲 <juzhe.zhong@rivai.ai>
Sent: Saturday, December 9, 2023 10:18 PM
To: rdapp.gcc <rdapp.gcc@gmail.com>; gcc-patches <gcc-patches@gcc.gnu.org>; palmer <palmer@dabbelt.com>; kito.cheng <kito.cheng@gmail.com>; Jeff Law <jeffreyalaw@gmail.com>
Cc: rdapp.gcc <rdapp.gcc@gmail.com>
Subject: Re: Re: [PATCH] RISC-V: Add vectorized strcmp.

I didn't use any special configuration:

--with-arch=rv64gcv_zvl256b --with-abi=lp64d --test --jobs=64 --with-sim=qemu --enable-gcc-checking=yes,assert,extra,rtlflag,rtl,gimple

________________________________
juzhe.zhong@rivai.ai<mailto:juzhe.zhong@rivai.ai>

From: Robin Dapp<mailto:rdapp.gcc@gmail.com>
Date: 2023-12-09 22:07
To: 钟居哲<mailto:juzhe.zhong@rivai.ai>; gcc-patches<mailto:gcc-patches@gcc.gnu.org>; palmer<mailto:palmer@dabbelt.com>; kito.cheng<mailto:kito.cheng@gmail.com>; Jeff Law<mailto:jeffreyalaw@gmail.com>
CC: rdapp.gcc<mailto:rdapp.gcc@gmail.com>
Subject: Re: [PATCH] RISC-V: Add vectorized strcmp.
> rv64gcv

With -minline-strcmp I assume?

Regards
Robin