* Re: [RFA/RFT] Tree-level lowering of generic vectors, part 4
@ 2004-07-28 19:12 Yossi Markovich
0 siblings, 0 replies; 8+ messages in thread
From: Yossi Markovich @ 2004-07-28 19:12 UTC (permalink / raw)
To: paolo.bonzini; +Cc: gcc-patches, Dorit Naishlos
FYI,
testing your last patches on powerpc-apple-darwin7.0.0 we get the following
:
>So here we go with part 3, which shuffles vector modes
>to the appropriate machine-dependent files.
There's a couple of improvements (tests that used to fail and now pass):
FAIL: g++.old-deja/g++.ns/new1.C (test for excess errors)
FAIL: 26_numerics/cmath/c99_classification_macros_c.cc (test for excess
errors)
Regressions remain as reported in
http://gcc.gnu.org/ml/gcc-patches/2004-07/msg02115.html
Applying your fix patch from
http://gcc.gnu.org/ml/gcc-patches/2004-07/msg02129.html:
>We can try to make use of V4SI for PowerPC with a patch like the one
attached, which >(looking at the assembly) seems to fix darwin-abi-2.c.
didn't solve the problem and we still get the same regressions, i.e:
in gcc:
FAIL: gcc.c-torture/execute/simd-2.c execution, -O3 -fomit-frame-pointer
FAIL: gcc.c-torture/execute/simd-2.c execution, -O3 -g
FAIL: gcc.dg/darwin-abi-2.c execution test
in g++:
FAIL: g++.dg/ext/altivec-3.C execution test
Applying your 4th patch from
http://gcc.gnu.org/ml/gcc-patches/2004-07/msg02197.html
fixes the darwin-abi-2.c failure. The rest of the failures above - remain
Yossi
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFA/RFT] Tree-level lowering of generic vectors, part 4
2004-10-07 14:45 ` Paolo Bonzini
@ 2004-10-18 1:58 ` David Edelsohn
0 siblings, 0 replies; 8+ messages in thread
From: David Edelsohn @ 2004-10-18 1:58 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: gcc-patches
I am worried about the places in the patch that you changed
ALTIVEC_VECTOR_MODE (MODE)
to
TREE_CODE (TYPE) == VECTOR_TYPE && int_size_in_bytes (TYPE) == 16
where it is used to determine whether the value can be passed in a vector
register. Altivec only allows specific modes and the original tests are
ensuring the modes are correct. For instance, Altivec does not support
V2DF.
The changes to function_arg_boundary looks okay and the change to
pass_by_reference looks like a good start, but everything else needs to be
more restrictive. GCC should pass those other modes in GPRs or FPRs, and
that would be correct.
Thanks, David
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFA/RFT] Tree-level lowering of generic vectors, part 4
2004-10-06 19:47 ` David Edelsohn
@ 2004-10-07 14:45 ` Paolo Bonzini
2004-10-18 1:58 ` David Edelsohn
0 siblings, 1 reply; 8+ messages in thread
From: Paolo Bonzini @ 2004-10-07 14:45 UTC (permalink / raw)
To: David Edelsohn; +Cc: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 1616 bytes --]
> 1) Please have GCC generate a warning when the vector is wider than an
> Altivec SIMD type.
Done. I checked that vector-2_x.c and vector-2_y.c generate it.
> 2) Please modify the GCC testcases so that the extra warning will not
> cause the testcases to fail due to excess warnings.
The relevant tests either deal with 8/16-byte vectors, except the
gcc.dg/compat tests that have -w.
$ find . | xargs grep -o '\(vector_size(\|mode(V\)[^)]*)'
./gcc.dg/compat/vector-defs.h:mode(V8QI)
./gcc.dg/compat/vector-defs.h:mode(V16QI)
...
./gcc.dg/compat/vector-defs.h:mode(V16SF)
./gcc.dg/compat/vector-defs.h:mode(V2DF)
Thank you very much.
I'd appreciate if anybody did some native testing.
darwin-abi-2.c now generates the same code with and without -maltivec,
and it does not do without this patch.
The vector-1_* tests now fail (as they did before my July patches),
while they do not with this patch:
- without -mcpu=8540 they ICE because of a bug in 8-byte vectors: an
insn does not satisfy its constraints:
(insn 52 59 69 (set (reg:DI 79 2 [ <result> ])
(mem:DI (plus:SI (reg/f:SI 31 31)
(const_int 48 [0x10])) [0 S8 A8])) 328
{*movdi_internal32} (nil) (nil))
The ICE happens before we reach the functions that would trigger the new
warning.
- with -mcpu=8540 they give an hard error, because without -maltivec you
cannot return AltiVec vectors. The bug that this patch fixes was
preventing the error. But, they also trigger the new warning.
- with -fsyntax-only they only give the warning, because the points
where we ICE or trigger the hard error is not reached.
Ok for mainline?
Paolo
[-- Attachment #2: vec-supported-mode-p.patch --]
[-- Type: text/plain, Size: 5956 bytes --]
2004-10-06 Paolo Bonzini <bonzini@gnu.org>
PR target/17836
* config/rs6000/rs6000.c (USE_ALTIVEC_FOR_ARG_P,
init_cumulative_args, function_arg_boundary,
function_arg_advance, function_arg, rs6000_gimplify_va_arg):
Look into the type instead of using ALTIVEC_VECTOR_MODE.
(rs6000_pass_by_reference): Same as above, plus warn
for wide (>16 bytes) vector types and pass them by reference.
(rs6000_return_in_memory): Return true for vectors
above 16 bytes.
Index: rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.720
diff -u -r1.720 rs6000.c
--- rs6000.c 5 Oct 2004 12:43:53 -0000 1.720
+++ rs6000.c 7 Oct 2004 09:33:42 -0000
@@ -4531,7 +4531,9 @@
/* Nonzero if we can use an AltiVec register to pass this arg. */
#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE,NAMED) \
- (ALTIVEC_VECTOR_MODE (MODE) \
+ ((TYPE) \
+ && TREE_CODE (TYPE) == VECTOR_TYPE \
+ && int_size_in_bytes (TYPE) == 16 \
&& (CUM)->vregno <= ALTIVEC_ARG_MAX_REG \
&& TARGET_ALTIVEC_ABI \
&& (NAMED))
@@ -4564,6 +4566,12 @@
&& (TARGET_AIX_STRUCT_RET
|| (unsigned HOST_WIDE_INT) int_size_in_bytes (type) > 8))
return true;
+ /* If TARGET_ALTIVEC is not set, we return 16-byte vectors in memory,
+ otherwise function.c tries to use a TImode register and we get
+ an unrecognizable insn. */
+ if (TREE_CODE (type) == VECTOR_TYPE
+ && int_size_in_bytes (type) > (TARGET_ALTIVEC ? 16 : 8))
+ return true;
if (DEFAULT_ABI == ABI_V4 && TYPE_MODE (type) == TFmode)
return true;
return false;
@@ -4626,7 +4634,8 @@
if (fntype
&& !TARGET_ALTIVEC
&& TARGET_ALTIVEC_ABI
- && ALTIVEC_VECTOR_MODE (TYPE_MODE (TREE_TYPE (fntype))))
+ && TREE_CODE (TREE_TYPE (fntype)) == VECTOR_TYPE
+ && int_size_in_bytes (TREE_TYPE (fntype)) == 16)
{
error ("Cannot return value in vector register because"
" altivec instructions are disabled, use -maltivec"
@@ -4710,14 +4719,15 @@
V.4 wants long longs to be double word aligned. */
int
-function_arg_boundary (enum machine_mode mode, tree type ATTRIBUTE_UNUSED)
+function_arg_boundary (enum machine_mode mode, tree type)
{
if (DEFAULT_ABI == ABI_V4 && GET_MODE_SIZE (mode) == 8)
return 64;
- else if (SPE_VECTOR_MODE (mode))
- return 64;
- else if (ALTIVEC_VECTOR_MODE (mode))
- return 128;
+ else if (type
+ && TREE_CODE (type) == VECTOR_TYPE
+ && (int_size_in_bytes (type) == 8
+ || int_size_in_bytes (type) == 16))
+ return 8 * int_size_in_bytes (type);
else
return PARM_BOUNDARY;
}
@@ -4754,7 +4764,10 @@
{
cum->nargs_prototype--;
- if (TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
+ if (TARGET_ALTIVEC_ABI
+ && type
+ && TREE_CODE (type) == VECTOR_TYPE
+ && int_size_in_bytes (type) == 16)
{
bool stack = false;
@@ -5057,7 +5070,10 @@
}
else
return gen_rtx_REG (mode, cum->vregno);
- else if (TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
+ else if (TARGET_ALTIVEC_ABI
+ && type
+ && TREE_CODE (type) == VECTOR_TYPE
+ && int_size_in_bytes (type) == 16)
{
if (named || abi == ABI_V4)
return NULL_RTX;
@@ -5296,25 +5312,64 @@
As an extension to all 32-bit ABIs, AltiVec vectors are passed by
reference unless the AltiVec vector extension ABI is in force.
- As an extension to all ABIs, variable sized types are passed by
- reference. */
+ As an extension to all ABIs, variable sized types and vectors
+ wider than 16 bytes are passed by reference. */
static bool
-rs6000_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED,
- enum machine_mode mode ATTRIBUTE_UNUSED,
- tree type, bool named ATTRIBUTE_UNUSED)
-{
- if ((DEFAULT_ABI == ABI_V4
- && ((type && AGGREGATE_TYPE_P (type))
- || mode == TFmode))
- || (TARGET_32BIT && !TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
- || (type && int_size_in_bytes (type) < 0))
+rs6000_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED,
+ enum machine_mode mode, tree type,
+ bool named ATTRIBUTE_UNUSED)
+{
+ if (DEFAULT_ABI == ABI_V4 && mode == TFmode)
+ {
+ if (TARGET_DEBUG_ARG)
+ fprintf (stderr, "function_arg_pass_by_reference: V4 long double\n");
+ return 1;
+ }
+
+ if (!type)
+ return 0;
+
+ if (DEFAULT_ABI == ABI_V4 && AGGREGATE_TYPE_P (type))
+ {
+ if (TARGET_DEBUG_ARG)
+ fprintf (stderr, "function_arg_pass_by_reference: V4 aggregates\n");
+ return 1;
+ }
+
+ if (TARGET_32BIT
+ && !TARGET_ALTIVEC_ABI
+ && TREE_CODE (type) == VECTOR_TYPE
+ && int_size_in_bytes (type) == 16)
{
if (TARGET_DEBUG_ARG)
- fprintf (stderr, "function_arg_pass_by_reference\n");
+ fprintf (stderr, "function_arg_pass_by_reference: AltiVec\n");
+ return 1;
+ }
+
+ if (TREE_CODE (type) == VECTOR_TYPE
+ && int_size_in_bytes (type) > 16)
+ {
+ static int warned_for_big_vectors = false;
+ if (TARGET_DEBUG_ARG)
+ fprintf (stderr, "function_arg_pass_by_reference: vectors >16 bytes\n");
+ if (!warned_for_big_vectors)
+ {
+ warning ("vectors bigger than 16 bytes are passed by reference: "
+ "this may change in a future version of the ABI");
+ warned_for_big_vectors = 1;
+ }
return 1;
}
+
+ if (int_size_in_bytes (type) == -1)
+ {
+ if (TARGET_DEBUG_ARG)
+ fprintf (stderr, "function_arg_pass_by_reference: variable size\n");
+ return 1;
+ }
+
return 0;
}
@@ -5646,7 +5701,9 @@
DECL_POINTER_ALIAS_SET (addr) = get_varargs_alias_set ();
/* AltiVec vectors never go in registers when -mabi=altivec. */
- if (TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (TYPE_MODE (type)))
+ if (TARGET_ALTIVEC_ABI
+ && TREE_CODE (type) == VECTOR_TYPE
+ && int_size_in_bytes (type) == 16)
align = 16;
else
{
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFA/RFT] Tree-level lowering of generic vectors, part 4
2004-07-23 22:03 ` [RFA/RFT] Tree-level lowering of generic vectors, part 4 Paolo Bonzini
2004-07-27 0:59 ` Richard Henderson
@ 2004-10-06 19:47 ` David Edelsohn
2004-10-07 14:45 ` Paolo Bonzini
1 sibling, 1 reply; 8+ messages in thread
From: David Edelsohn @ 2004-10-06 19:47 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: gcc-patches
The rs6000 part of this patch is okay with the following changes:
1) Please have GCC generate a warning when the vector is wider than an
Altivec SIMD type.
2) Please modify the GCC testcases so that the extra warning will not
cause the testcases to fail due to excess warnings.
David
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFA/RFT] Tree-level lowering of generic vectors, part 4
2004-08-02 7:45 ` Paolo Bonzini
@ 2004-08-02 8:11 ` Paolo Bonzini
0 siblings, 0 replies; 8+ messages in thread
From: Paolo Bonzini @ 2004-08-02 8:11 UTC (permalink / raw)
To: Richard Henderson; +Cc: gcc-patches, Yossi Markovich
Richard Henderson wrote:
> On Fri, Jul 23, 2004 at 05:30:15PM +0200, Paolo Bonzini wrote:
>
>> * config/rs6000/rs6000.c (USE_ALTIVEC_FOR_ARG_P,
>> init_cumulative_args, function_arg_boundary,
>> function_arg_advance, function_arg,
>> rs6000_pass_by_reference, rs6000_gimplify_va_arg):
>> Look into the type instead of using
>> ALTIVEC_VECTOR_MODE.
>
> An rs6000 maintainer should review this to be sure that all vector types
> of a given width should be treated identically.
My rationale here was that SPE vectors are all exactly 8-byte wide,
while Altivec vectors are all exactly 16-byte wide.
>> * config/i386/i386.c (function_arg): Always treat 8-
>> and 16-byte wide vectors the same, even if MMX/SSE
>> are disabled.
>> (contains_128bit_aligned_vector_p): Add comment.
>
> Applied.
Thanks.
Paolo
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFA/RFT] Tree-level lowering of generic vectors, part 4
2004-07-27 0:59 ` Richard Henderson
@ 2004-08-02 7:45 ` Paolo Bonzini
2004-08-02 8:11 ` Paolo Bonzini
0 siblings, 1 reply; 8+ messages in thread
From: Paolo Bonzini @ 2004-08-02 7:45 UTC (permalink / raw)
To: gcc-patches; +Cc: gcc-patches, Yossi Markovich
Richard Henderson wrote:
> On Fri, Jul 23, 2004 at 05:30:15PM +0200, Paolo Bonzini wrote:
>
>> * config/rs6000/rs6000.c (USE_ALTIVEC_FOR_ARG_P,
>> init_cumulative_args, function_arg_boundary,
>> function_arg_advance, function_arg,
>> rs6000_pass_by_reference, rs6000_gimplify_va_arg):
>> Look into the type instead of using
>> ALTIVEC_VECTOR_MODE.
>
> An rs6000 maintainer should review this to be sure that all vector types
> of a given width should be treated identically.
My rationale here was that SPE vectors are all exactly 8-byte wide,
while Altivec vectors are all exactly 16-byte wide.
>> * config/i386/i386.c (function_arg): Always treat 8-
>> and 16-byte wide vectors the same, even if MMX/SSE
>> are disabled.
>> (contains_128bit_aligned_vector_p): Add comment.
>
> Applied.
Thanks.
Paolo
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFA/RFT] Tree-level lowering of generic vectors, part 4
2004-07-23 22:03 ` [RFA/RFT] Tree-level lowering of generic vectors, part 4 Paolo Bonzini
@ 2004-07-27 0:59 ` Richard Henderson
2004-08-02 7:45 ` Paolo Bonzini
2004-10-06 19:47 ` David Edelsohn
1 sibling, 1 reply; 8+ messages in thread
From: Richard Henderson @ 2004-07-27 0:59 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: gcc-patches, Yossi Markovich
On Fri, Jul 23, 2004 at 05:30:15PM +0200, Paolo Bonzini wrote:
> * config/rs6000/rs6000.c (USE_ALTIVEC_FOR_ARG_P,
> init_cumulative_args, function_arg_boundary,
> function_arg_advance, function_arg,
> rs6000_pass_by_reference, rs6000_gimplify_va_arg):
> Look into the type instead of using
> ALTIVEC_VECTOR_MODE.
An rs6000 maintainer should review this to be sure that all vector types
of a given width should be treated identically.
> * config/i386/i386.c (function_arg): Always treat 8-
> and 16-byte wide vectors the same, even if MMX/SSE
> are disabled.
> (contains_128bit_aligned_vector_p): Add comment.
Applied.
r~
^ permalink raw reply [flat|nested] 8+ messages in thread
* [RFA/RFT] Tree-level lowering of generic vectors, part 4
2004-07-23 6:36 ` Richard Henderson
@ 2004-07-23 22:03 ` Paolo Bonzini
2004-07-27 0:59 ` Richard Henderson
2004-10-06 19:47 ` David Edelsohn
0 siblings, 2 replies; 8+ messages in thread
From: Paolo Bonzini @ 2004-07-23 22:03 UTC (permalink / raw)
To: gcc-patches; +Cc: Yossi Markovich
[-- Attachment #1: Type: text/plain, Size: 386 bytes --]
> Huh? You can also look at TREE_CODE (type) == VECTOR_TYPE etc.
Right. Is the attached patch ok? It was bootstrapped/regtested
i686-pc-linux-gnu, where it fixes the failure in i386-sse-5.c, and seems
to fix darwin-abi-2.c as well with a cross to powerpc-apple-darwin7.4.0.
I won't be able to apply it until August 2nd.
Thanks again for reviewing the rest of this work.
Paolo
[-- Attachment #2: vec-supported-mode-p.patch --]
[-- Type: text/plain, Size: 5538 bytes --]
2004-07-22 Paolo Bonzini <bonzini@gnu.org>
* config/rs6000/rs6000.c (USE_ALTIVEC_FOR_ARG_P,
init_cumulative_args, function_arg_boundary,
function_arg_advance, function_arg,
rs6000_pass_by_reference, rs6000_gimplify_va_arg):
Look into the type instead of using
ALTIVEC_VECTOR_MODE.
* config/i386/i386.c (function_arg): Always treat 8-
and 16-byte wide vectors the same, even if MMX/SSE
are disabled.
(contains_128bit_aligned_vector_p): Add comment.
Index: config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.671
diff -u -r1.671 rs6000.c
--- config/rs6000/rs6000.c 23 Jul 2004 04:35:17 -0000 1.671
+++ config/rs6000/rs6000.c 23 Jul 2004 13:44:19 -0000
@@ -4426,7 +4426,9 @@
/* Nonzero if we can use an AltiVec register to pass this arg. */
#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE,NAMED) \
- (ALTIVEC_VECTOR_MODE (MODE) \
+ (type \
+ && TREE_CODE (TYPE) == VECTOR_TYPE \
+ && int_size_in_bytes (TYPE) == 16 \
&& (CUM)->vregno <= ALTIVEC_ARG_MAX_REG \
&& TARGET_ALTIVEC_ABI \
&& (NAMED))
@@ -4521,7 +4523,8 @@
if (fntype
&& !TARGET_ALTIVEC
&& TARGET_ALTIVEC_ABI
- && ALTIVEC_VECTOR_MODE (TYPE_MODE (TREE_TYPE (fntype))))
+ && TREE_CODE (TREE_TYPE (fntype)) == VECTOR_TYPE
+ && int_size_in_bytes (TREE_TYPE (fntype)) == 16)
{
error ("Cannot return value in vector register because"
" altivec instructions are disabled, use -maltivec"
@@ -4609,14 +4612,15 @@
V.4 wants long longs to be double word aligned. */
int
-function_arg_boundary (enum machine_mode mode, tree type ATTRIBUTE_UNUSED)
+function_arg_boundary (enum machine_mode mode, tree type)
{
if (DEFAULT_ABI == ABI_V4 && GET_MODE_SIZE (mode) == 8)
return 64;
- else if (SPE_VECTOR_MODE (mode))
- return 64;
- else if (ALTIVEC_VECTOR_MODE (mode))
- return 128;
+ else if (type
+ && TREE_CODE (type) == VECTOR_TYPE
+ && (int_size_in_bytes (type) == 8
+ || int_size_in_bytes (type) == 16))
+ return 8 * int_size_in_bytes (type);
else
return PARM_BOUNDARY;
}
@@ -4653,7 +4657,10 @@
{
cum->nargs_prototype--;
- if (TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
+ if (TARGET_ALTIVEC_ABI
+ && type
+ && TREE_CODE (type) == VECTOR_TYPE
+ && int_size_in_bytes (type) == 16)
{
bool stack = false;
@@ -4956,7 +4963,10 @@
}
else
return gen_rtx_REG (mode, cum->vregno);
- else if (TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
+ else if (TARGET_ALTIVEC_ABI
+ && type
+ && TREE_CODE (type) == VECTOR_TYPE
+ && int_size_in_bytes (type) == 16)
{
if (named || abi == ABI_V4)
return NULL_RTX;
@@ -5189,13 +5199,17 @@
static bool
rs6000_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED,
- enum machine_mode mode ATTRIBUTE_UNUSED,
- tree type, bool named ATTRIBUTE_UNUSED)
+ enum machine_mode mode, tree type,
+ bool named ATTRIBUTE_UNUSED)
{
if ((DEFAULT_ABI == ABI_V4
&& ((type && AGGREGATE_TYPE_P (type))
|| mode == TFmode))
- || (TARGET_32BIT && !TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
+ || (TARGET_32BIT
+ && !TARGET_ALTIVEC_ABI
+ && type
+ && TREE_CODE (type) == VECTOR_TYPE
+ && int_size_in_bytes (type) == 16)
|| (type && int_size_in_bytes (type) < 0))
{
if (TARGET_DEBUG_ARG)
@@ -5534,7 +5548,9 @@
DECL_POINTER_ALIAS_SET (addr) = get_varargs_alias_set ();
/* AltiVec vectors never go in registers when -mabi=altivec. */
- if (TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (TYPE_MODE (type)))
+ if (TARGET_ALTIVEC_ABI
+ && TREE_CODE (type) == VECTOR_TYPE
+ && int_size_in_bytes (type) == 16)
align = 16;
else
{
Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.697
diff -u -p -r1.697 i386.c
--- config/i386/i386.c 23 Jul 2004 04:35:15 -0000 1.697
+++ config/i386/i386.c 23 Jul 2004 15:24:20 -0000
@@ -2664,6 +2664,28 @@ function_arg (CUMULATIVE_ARGS *cum, /* c
int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
static bool warnedsse, warnedmmx;
+ /* To simplify the code below, represent vector types with a vector mode
+ even if MMX/SSE are not active. */
+ if (type
+ && TREE_CODE (type) == VECTOR_TYPE
+ && (bytes == 8 || bytes == 16)
+ && GET_MODE_CLASS (TYPE_MODE (type)) != MODE_VECTOR_INT
+ && GET_MODE_CLASS (TYPE_MODE (type)) != MODE_VECTOR_FLOAT)
+ {
+ enum machine_mode innermode = TYPE_MODE (TREE_TYPE (type));
+ mode = TREE_CODE (TREE_TYPE (type)) == REAL_TYPE
+ ? MIN_MODE_VECTOR_FLOAT : MIN_MODE_VECTOR_INT;
+
+ /* Get the mode which has this inner mode and number of units. */
+ while (GET_MODE_NUNITS (mode) != TYPE_VECTOR_SUBPARTS (type)
+ || GET_MODE_INNER (mode) != innermode)
+ {
+ mode = GET_MODE_WIDER_MODE (mode);
+ if (mode == VOIDmode)
+ abort ();
+ }
+ }
+
/* Handle a hidden AL argument containing number of registers for varargs
x86-64 functions. For i386 ABI just return constm1_rtx to avoid
any AL settings. */
@@ -2794,7 +2816,7 @@ ix86_pass_by_reference (CUMULATIVE_ARGS
}
/* Return true when TYPE should be 128bit aligned for 32bit argument passing
- ABI */
+ ABI. Only called if TARGET_SSE. */
static bool
contains_128bit_aligned_vector_p (tree type)
{
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2004-10-18 1:18 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
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2004-07-28 19:12 [RFA/RFT] Tree-level lowering of generic vectors, part 4 Yossi Markovich
-- strict thread matches above, loose matches on Subject: below --
2004-07-22 18:39 [RFC/RFT] Tree-level lowering of generic vectors (take 2) Yossi Markovich
2004-07-22 20:49 ` Paolo Bonzini
2004-07-23 6:36 ` Richard Henderson
2004-07-23 22:03 ` [RFA/RFT] Tree-level lowering of generic vectors, part 4 Paolo Bonzini
2004-07-27 0:59 ` Richard Henderson
2004-08-02 7:45 ` Paolo Bonzini
2004-08-02 8:11 ` Paolo Bonzini
2004-10-06 19:47 ` David Edelsohn
2004-10-07 14:45 ` Paolo Bonzini
2004-10-18 1:58 ` David Edelsohn
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