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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jan 2023 17:28:11.6538 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5c021afa-b87e-4845-bf86-08daedafe37b X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VI1EUR03FT023.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV2PR08MB8049 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi Richard,=0A= =0A= > Hmm, but the point of the original patch was to support code generators= =0A= > that emit DW_CFA_val_expression instead of DW_CFA_AARCH64_negate_ra_state= .=0A= > Doesn't this patch undo that?=0A= =0A= Well it wasn't clear from the code or comments that was supported. I've=0A= added that back in v2.=0A= =0A= > Also, if I understood correctly, the reason we use REG_UNSAVED is to=0A= > ensure that state from one frame isn't carried across to a parent frame,= =0A= > in cases where the parent frame lacks any signing.=A0 That is, each frame= =0A= > should start out with a zero bit even if a child frame is unwound while= =0A= > it has a set bit.=0A= =0A= This works fine since all registers are initialized to REG_UNSAVED every fr= ame.=0A= =0A= In v2 I've removed some clutter and encode the signing state in REG_UNSAVED= /=0A= REG_UNDEFINED.=0A= =0A= Cheers,=0A= Wilco=0A= =0A= v2: Further cleanup, support DW_CFA_expression.=0A= =0A= A recent change only initializes the regs.how[] during Dwarf unwinding=0A= which resulted in an uninitialized offset used in return address signing=0A= and random failures during unwinding. The fix is to encode the return=0A= address signing state in REG_UNSAVED and REG_UNDEFINED.=0A= =0A= Passes bootstrap & regress, OK for commit?=0A= =0A= libgcc/=0A= PR target/107678=0A= * unwind-dw2.c (execute_cfa_program): Use REG_UNSAVED/UNDEFINED=0A= to encode return address signing state.=0A= * config/aarch64/aarch64-unwind.h (aarch64_demangle_return_addr)=0A= Check current return address signing state.=0A= (aarch64_frob_update_contex): Remove.=0A= =0A= ---=0A= diff --git a/libgcc/config/aarch64/aarch64-unwind.h b/libgcc/config/aarch64= /aarch64-unwind.h=0A= index 26db9cbd9e5c526e0c410a4fc6be2bedb7d261cf..1afc3f9d308b95bc787398263e6= 29bab226ff1ba 100644=0A= --- a/libgcc/config/aarch64/aarch64-unwind.h=0A= +++ b/libgcc/config/aarch64/aarch64-unwind.h=0A= @@ -29,8 +29,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. = If not, see=0A= =0A= #define MD_DEMANGLE_RETURN_ADDR(context, fs, addr) \=0A= aarch64_demangle_return_addr (context, fs, addr)=0A= -#define MD_FROB_UPDATE_CONTEXT(context, fs) \=0A= - aarch64_frob_update_context (context, fs)=0A= =0A= static inline int=0A= aarch64_cie_signed_with_b_key (struct _Unwind_Context *context)=0A= @@ -55,42 +53,27 @@ aarch64_cie_signed_with_b_key (struct _Unwind_Context *= context)=0A= =0A= static inline void *=0A= aarch64_demangle_return_addr (struct _Unwind_Context *context,=0A= - _Unwind_FrameState *fs ATTRIBUTE_UNUSED,=0A= + _Unwind_FrameState *fs,=0A= _Unwind_Word addr_word)=0A= {=0A= void *addr =3D (void *)addr_word;=0A= - if (context->flags & RA_SIGNED_BIT)=0A= + const int reg =3D DWARF_REGNUM_AARCH64_RA_STATE;=0A= +=0A= + if (fs->regs.how[reg] =3D=3D REG_UNSAVED)=0A= + return addr;=0A= +=0A= + /* Return-address signing state is toggled by DW_CFA_GNU_window_save (wh= ere=0A= + REG_UNDEFINED means enabled), or set by a DW_CFA_expression. */=0A= + if (fs->regs.how[reg] =3D=3D REG_UNDEFINED=0A= + || (_Unwind_GetGR (context, reg) & 0x1) !=3D 0)=0A= {=0A= _Unwind_Word salt =3D (_Unwind_Word) context->cfa;=0A= if (aarch64_cie_signed_with_b_key (context) !=3D 0)=0A= return __builtin_aarch64_autib1716 (addr, salt);=0A= return __builtin_aarch64_autia1716 (addr, salt);=0A= }=0A= - else=0A= - return addr;=0A= -}=0A= -=0A= -/* Do AArch64 private initialization on CONTEXT based on frame info FS. M= ark=0A= - CONTEXT as return address signed if bit 0 of DWARF_REGNUM_AARCH64_RA_ST= ATE is=0A= - set. */=0A= -=0A= -static inline void=0A= -aarch64_frob_update_context (struct _Unwind_Context *context,=0A= - _Unwind_FrameState *fs)=0A= -{=0A= - const int reg =3D DWARF_REGNUM_AARCH64_RA_STATE;=0A= - int ra_signed;=0A= - if (fs->regs.how[reg] =3D=3D REG_UNSAVED)=0A= - ra_signed =3D fs->regs.reg[reg].loc.offset & 0x1;=0A= - else=0A= - ra_signed =3D _Unwind_GetGR (context, reg) & 0x1;=0A= - if (ra_signed)=0A= - /* The flag is used for re-authenticating EH handler's address. */=0A= - context->flags |=3D RA_SIGNED_BIT;=0A= - else=0A= - context->flags &=3D ~RA_SIGNED_BIT;=0A= =0A= - return;=0A= + return addr;=0A= }=0A= =0A= #endif /* defined AARCH64_UNWIND_H && defined __ILP32__ */=0A= diff --git a/libgcc/unwind-dw2.c b/libgcc/unwind-dw2.c=0A= index eaceace20298b9b13344aff9d1fe9ee5f9c7bd73..7c200cb6e730c5d63cf200ebe8a= 903f858e79d07 100644=0A= --- a/libgcc/unwind-dw2.c=0A= +++ b/libgcc/unwind-dw2.c=0A= @@ -139,7 +139,6 @@ struct _Unwind_Context=0A= #define EXTENDED_CONTEXT_BIT ((~(_Unwind_Word) 0 >> 2) + 1)=0A= /* Bit reserved on AArch64, return address has been signed with A or B= =0A= key. */=0A= -#define RA_SIGNED_BIT ((~(_Unwind_Word) 0 >> 3) + 1)=0A= _Unwind_Word flags;=0A= /* 0 for now, can be increased when further fields are added to=0A= struct _Unwind_Context. */=0A= @@ -1206,8 +1205,10 @@ execute_cfa_program (const unsigned char *insn_ptr,= =0A= /* This CFA is multiplexed with Sparc. On AArch64 it's used to toggle= =0A= return address signing status. */=0A= reg =3D DWARF_REGNUM_AARCH64_RA_STATE;=0A= - gcc_assert (fs->regs.how[reg] =3D=3D REG_UNSAVED);=0A= - fs->regs.reg[reg].loc.offset ^=3D 1;=0A= + if (fs->regs.how[reg] =3D=3D REG_UNSAVED)=0A= + fs->regs.how[reg] =3D REG_UNDEFINED;=0A= + else=0A= + fs->regs.how[reg] =3D REG_UNSAVED;=0A= #else=0A= /* ??? Hardcoded for SPARC register window configuration. */=0A= if (__LIBGCC_DWARF_FRAME_REGISTERS__ >=3D 32)=0A= =0A= =0A= =0A=