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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Nov 2022 17:02:09.3853 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b1104cf1-b033-48d1-8b47-08daccab4add X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT007.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR08MB9087 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Andrea Corallo > Sent: Thursday, November 17, 2022 4:38 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov ; Richard Earnshaw > ; Andrea Corallo > Subject: [PATCH 30/35] arm: improve tests for vqrdmlahq* >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Improve > test. > * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise. Ok. Thanks, Kyrill > --- > .../arm/mve/intrinsics/vqrdmlahq_m_n_s16.c | 34 ++++++++++++++----- > .../arm/mve/intrinsics/vqrdmlahq_m_n_s32.c | 34 ++++++++++++++----- > .../arm/mve/intrinsics/vqrdmlahq_m_n_s8.c | 34 ++++++++++++++----- > .../arm/mve/intrinsics/vqrdmlahq_n_s16.c | 24 +++++++++---- > .../arm/mve/intrinsics/vqrdmlahq_n_s32.c | 24 +++++++++---- > .../arm/mve/intrinsics/vqrdmlahq_n_s8.c | 24 +++++++++---- > 6 files changed, 132 insertions(+), 42 deletions(-) >=20 > diff --git > a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c > index 70c3fa0e9b1..07d689279ac 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmlaht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > -foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) > +foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) > { > - return vqrdmlahq_m_n_s16 (a, b, c, p); > + return vqrdmlahq_m_n_s16 (add, m1, m2, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmlaht.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmlaht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > -foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) > +foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) > { > - return vqrdmlahq_m (a, b, c, p); > + return vqrdmlahq_m (add, m1, m2, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmlaht.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git > a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c > index 75ed9911276..3b02ca16038 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmlaht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > -foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) > +foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) > { > - return vqrdmlahq_m_n_s32 (a, b, c, p); > + return vqrdmlahq_m_n_s32 (add, m1, m2, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmlaht.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmlaht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > -foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) > +foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) > { > - return vqrdmlahq_m (a, b, c, p); > + return vqrdmlahq_m (add, m1, m2, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmlaht.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8= .c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c > index ddaea545f40..b661bdcb4cf 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmlaht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > -foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) > +foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) > { > - return vqrdmlahq_m_n_s8 (a, b, c, p); > + return vqrdmlahq_m_n_s8 (add, m1, m2, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmlaht.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmlaht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > -foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) > +foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) > { > - return vqrdmlahq_m (a, b, c, p); > + return vqrdmlahq_m (add, m1, m2, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmlaht.s8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c > index 45e74971838..16804735b32 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqrdmlah.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > -foo (int16x8_t a, int16x8_t b, int16_t c) > +foo (int16x8_t add, int16x8_t m1, int16_t m2) > { > - return vqrdmlahq_n_s16 (a, b, c); > + return vqrdmlahq_n_s16 (add, m1, m2); > } >=20 > -/* { dg-final { scan-assembler "vqrdmlah.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqrdmlah.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > -foo1 (int16x8_t a, int16x8_t b, int16_t c) > +foo1 (int16x8_t add, int16x8_t m1, int16_t m2) > { > - return vqrdmlahq (a, b, c); > + return vqrdmlahq (add, m1, m2); > } >=20 > -/* { dg-final { scan-assembler "vqrdmlah.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c > index 79bb9c98b12..d7d3dc06d7f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqrdmlah.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > -foo (int32x4_t a, int32x4_t b, int32_t c) > +foo (int32x4_t add, int32x4_t m1, int32_t m2) > { > - return vqrdmlahq_n_s32 (a, b, c); > + return vqrdmlahq_n_s32 (add, m1, m2); > } >=20 > -/* { dg-final { scan-assembler "vqrdmlah.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqrdmlah.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > -foo1 (int32x4_t a, int32x4_t b, int32_t c) > +foo1 (int32x4_t add, int32x4_t m1, int32_t m2) > { > - return vqrdmlahq (a, b, c); > + return vqrdmlahq (add, m1, m2); > } >=20 > -/* { dg-final { scan-assembler "vqrdmlah.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c > index 220518ae698..d3f9f25f11c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqrdmlah.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > -foo (int8x16_t a, int8x16_t b, int8_t c) > +foo (int8x16_t add, int8x16_t m1, int8_t m2) > { > - return vqrdmlahq_n_s8 (a, b, c); > + return vqrdmlahq_n_s8 (add, m1, m2); > } >=20 > -/* { dg-final { scan-assembler "vqrdmlah.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqrdmlah.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > -foo1 (int8x16_t a, int8x16_t b, int8_t c) > +foo1 (int8x16_t add, int8x16_t m1, int8_t m2) > { > - return vqrdmlahq (a, b, c); > + return vqrdmlahq (add, m1, m2); > } >=20 > -/* { dg-final { scan-assembler "vqrdmlah.s8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > -- > 2.25.1