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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Nov 2022 16:56:19.6234 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f49c7d36-d78f-47be-7e00-08daccaa7a66 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT013.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB10265 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Andrea Corallo > Sent: Thursday, November 17, 2022 4:38 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov ; Richard Earnshaw > ; Andrea Corallo > Subject: [PATCH 25/35] arm: improve tests and fix vmlaldavaxq* >=20 > gcc/ChangeLog: >=20 > * config/arm/mve.md (mve_vmlaldavaq_) > (mve_vmlaldavaxq_s, mve_vmlaldavaxq_p_): > Fix > spacing vs tabs. >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Improve > tests. > * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise. Ok. Thanks, Kyrill > --- > gcc/config/arm/mve.md | 6 ++-- > .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 32 +++++++++++++++---- > .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 32 +++++++++++++++---- > .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 24 ++++++++++---- > .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 24 ++++++++++---- > 5 files changed, 91 insertions(+), 27 deletions(-) >=20 > diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md > index 714dc6fc7ce..d2ffae6a425 100644 > --- a/gcc/config/arm/mve.md > +++ b/gcc/config/arm/mve.md > @@ -4163,7 +4163,7 @@ (define_insn "mve_vmlaldavaq_" > VMLALDAVAQ)) > ] > "TARGET_HAVE_MVE" > - "vmlaldava.%# %Q0, %R0, %q2, %q3" > + "vmlaldava.%#\t%Q0, %R0, %q2, %q3" > [(set_attr "type" "mve_move") > ]) >=20 > @@ -4179,7 +4179,7 @@ (define_insn "mve_vmlaldavaxq_s" > VMLALDAVAXQ_S)) > ] > "TARGET_HAVE_MVE" > - "vmlaldavax.s%# %Q0, %R0, %q2, %q3" > + "vmlaldavax.s%#\t%Q0, %R0, %q2, %q3" > [(set_attr "type" "mve_move") > ]) >=20 > @@ -6126,7 +6126,7 @@ (define_insn > "mve_vmlaldavaxq_p_" > VMLALDAVAXQ_P)) > ] > "TARGET_HAVE_MVE" > - "vpst\;vmlaldavaxt.%# %Q0, %R0, %q2, %q3" > + "vpst\;vmlaldavaxt.%#\t%Q0, %R0, %q2, %q3" > [(set_attr "type" "mve_move") > (set_attr "length""8")]) >=20 > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s1= 6.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c > index f33d3880236..87f0354a636 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, > q[0-9]+(?: @.*|) > +** ... > +*/ > int64_t > -foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) > +foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) > { > - return vmlaldavaxq_p_s16 (a, b, c, p); > + return vmlaldavaxq_p_s16 (add, m1, m2, p); > } >=20 > -/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, > q[0-9]+(?: @.*|) > +** ... > +*/ > int64_t > -foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) > +foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) > { > - return vmlaldavaxq_p (a, b, c, p); > + return vmlaldavaxq_p (add, m1, m2, p); > } >=20 > -/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s3= 2.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c > index ab072a9850e..d26bf5b90af 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, > q[0-9]+(?: @.*|) > +** ... > +*/ > int64_t > -foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) > +foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) > { > - return vmlaldavaxq_p_s32 (a, b, c, p); > + return vmlaldavaxq_p_s32 (add, m1, m2, p); > } >=20 > -/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, > q[0-9]+(?: @.*|) > +** ... > +*/ > int64_t > -foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) > +foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) > { > - return vmlaldavaxq_p (a, b, c, p); > + return vmlaldavaxq_p (add, m1, m2, p); > } >=20 > -/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c > index e68fbd2df94..3a37e7a58a9 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+= (?: > @.*|) > +** ... > +*/ > int64_t > -foo (int64_t a, int16x8_t b, int16x8_t c) > +foo (int64_t add, int16x8_t m1, int16x8_t m2) > { > - return vmlaldavaxq_s16 (a, b, c); > + return vmlaldavaxq_s16 (add, m1, m2); > } >=20 > -/* { dg-final { scan-assembler "vmlaldavax.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+= (?: > @.*|) > +** ... > +*/ > int64_t > -foo1 (int64_t a, int16x8_t b, int16x8_t c) > +foo1 (int64_t add, int16x8_t m1, int16x8_t m2) > { > - return vmlaldavaxq (a, b, c); > + return vmlaldavaxq (add, m1, m2); > } >=20 > -/* { dg-final { scan-assembler "vmlaldavax.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c > index 7b6fea289da..155b8be70f0 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+= (?: > @.*|) > +** ... > +*/ > int64_t > -foo (int64_t a, int32x4_t b, int32x4_t c) > +foo (int64_t add, int32x4_t m1, int32x4_t m2) > { > - return vmlaldavaxq_s32 (a, b, c); > + return vmlaldavaxq_s32 (add, m1, m2); > } >=20 > -/* { dg-final { scan-assembler "vmlaldavax.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+= (?: > @.*|) > +** ... > +*/ > int64_t > -foo1 (int64_t a, int32x4_t b, int32x4_t c) > +foo1 (int64_t add, int32x4_t m1, int32x4_t m2) > { > - return vmlaldavaxq (a, b, c); > + return vmlaldavaxq (add, m1, m2); > } >=20 > -/* { dg-final { scan-assembler "vmlaldavax.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > -- > 2.25.1