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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Nov 2022 16:56:46.4724 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c253e7ef-b9fd-46f4-a0af-08daccaa8a75 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT063.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4PR08MB8069 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Andrea Corallo > Sent: Thursday, November 17, 2022 4:38 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov ; Richard Earnshaw > ; Andrea Corallo > Subject: [PATCH 26/35] arm: improve tests for vmlasq* >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Improve test. > * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c: Likewise. Ok. Thanks, Kyrill > --- > .../arm/mve/intrinsics/vmlasq_m_n_s16.c | 34 ++++++++++--- > .../arm/mve/intrinsics/vmlasq_m_n_s32.c | 34 ++++++++++--- > .../arm/mve/intrinsics/vmlasq_m_n_s8.c | 34 ++++++++++--- > .../arm/mve/intrinsics/vmlasq_m_n_u16.c | 50 ++++++++++++++++--- > .../arm/mve/intrinsics/vmlasq_m_n_u32.c | 50 ++++++++++++++++--- > .../arm/mve/intrinsics/vmlasq_m_n_u8.c | 50 ++++++++++++++++--- > .../arm/mve/intrinsics/vmlasq_n_s16.c | 24 ++++++--- > .../arm/mve/intrinsics/vmlasq_n_s32.c | 24 ++++++--- > .../arm/mve/intrinsics/vmlasq_n_s8.c | 24 ++++++--- > .../arm/mve/intrinsics/vmlasq_n_u16.c | 36 ++++++++++--- > .../arm/mve/intrinsics/vmlasq_n_u32.c | 36 ++++++++++--- > .../arm/mve/intrinsics/vmlasq_n_u8.c | 36 ++++++++++--- > 12 files changed, 348 insertions(+), 84 deletions(-) >=20 > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c > index bf66e616ec7..af6e588adad 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > -foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) > +foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) > { > - return vmlasq_m_n_s16 (a, b, c, p); > + return vmlasq_m_n_s16 (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > -foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) > +foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) > { > - return vmlasq_m (a, b, c, p); > + return vmlasq_m (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c > index 53c21e2e5b6..9d0cc3076d9 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > -foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) > +foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) > { > - return vmlasq_m_n_s32 (a, b, c, p); > + return vmlasq_m_n_s32 (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > -foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) > +foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) > { > - return vmlasq_m (a, b, c, p); > + return vmlasq_m (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c > index ac08b15fdbe..772ad8b1e76 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > -foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) > +foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) > { > - return vmlasq_m_n_s8 (a, b, c, p); > + return vmlasq_m_n_s8 (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > -foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) > +foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) > { > - return vmlasq_m (a, b, c, p); > + return vmlasq_m (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.s8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c > index 99f1e28c7d5..b02dc64a31b 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > -foo (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p) > +foo (uint16x8_t m1, uint16x8_t m2, uint16_t add, mve_pred16_t p) > { > - return vmlasq_m_n_u16 (a, b, c, p); > + return vmlasq_m_n_u16 (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > -foo1 (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p) > +foo1 (uint16x8_t m1, uint16x8_t m2, uint16_t add, mve_pred16_t p) > { > - return vmlasq_m (a, b, c, p); > + return vmlasq_m (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.u16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) > +{ > + return vmlasq_m (m1, m2, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c > index 8d8edca6024..0214cf2136e 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > -foo (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p) > +foo (uint32x4_t m1, uint32x4_t m2, uint32_t add, mve_pred16_t p) > { > - return vmlasq_m_n_u32 (a, b, c, p); > + return vmlasq_m_n_u32 (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > -foo1 (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p) > +foo1 (uint32x4_t m1, uint32x4_t m2, uint32_t add, mve_pred16_t p) > { > - return vmlasq_m (a, b, c, p); > + return vmlasq_m (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.u32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) > +{ > + return vmlasq_m (m1, m2, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c > index e7f685bbcaa..c9824e332f7 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > -foo (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p) > +foo (uint8x16_t m1, uint8x16_t m2, uint8_t add, mve_pred16_t p) > { > - return vmlasq_m_n_u8 (a, b, c, p); > + return vmlasq_m_n_u8 (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > -foo1 (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p) > +foo1 (uint8x16_t m1, uint8x16_t m2, uint8_t add, mve_pred16_t p) > { > - return vmlasq_m (a, b, c, p); > + return vmlasq_m (m1, m2, add, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmlast.u8" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmlast.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p) > +{ > + return vmlasq_m (m1, m2, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c > index 8bfe3c31096..6708a741790 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmlas.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > -foo (int16x8_t a, int16x8_t b, int16_t c) > +foo (int16x8_t m1, int16x8_t m2, int16_t add) > { > - return vmlasq_n_s16 (a, b, c); > + return vmlasq_n_s16 (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmlas.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > -foo1 (int16x8_t a, int16x8_t b, int16_t c) > +foo1 (int16x8_t m1, int16x8_t m2, int16_t add) > { > - return vmlasq (a, b, c); > + return vmlasq (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c > index db06182abec..4e8bf32e016 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmlas.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > -foo (int32x4_t a, int32x4_t b, int32_t c) > +foo (int32x4_t m1, int32x4_t m2, int32_t add) > { > - return vmlasq_n_s32 (a, b, c); > + return vmlasq_n_s32 (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmlas.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > -foo1 (int32x4_t a, int32x4_t b, int32_t c) > +foo1 (int32x4_t m1, int32x4_t m2, int32_t add) > { > - return vmlasq (a, b, c); > + return vmlasq (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c > index 3a151650ef4..1cb1a31459c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmlas.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > -foo (int8x16_t a, int8x16_t b, int8_t c) > +foo (int8x16_t m1, int8x16_t m2, int8_t add) > { > - return vmlasq_n_s8 (a, b, c); > + return vmlasq_n_s8 (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmlas.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > -foo1 (int8x16_t a, int8x16_t b, int8_t c) > +foo1 (int8x16_t m1, int8x16_t m2, int8_t add) > { > - return vmlasq (a, b, c); > + return vmlasq (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.s8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c > index b9444f2f6a3..e03c91ef298 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmlas.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > -foo (uint16x8_t a, uint16x8_t b, uint16_t c) > +foo (uint16x8_t m1, uint16x8_t m2, uint16_t add) > { > - return vmlasq_n_u16 (a, b, c); > + return vmlasq_n_u16 (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmlas.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > -foo1 (uint16x8_t a, uint16x8_t b, uint16_t c) > +foo1 (uint16x8_t m1, uint16x8_t m2, uint16_t add) > { > - return vmlasq (a, b, c); > + return vmlasq (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.u16" } } */ > +/* > +**foo2: > +** ... > +** vmlas.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (uint16x8_t m1, uint16x8_t m2) > +{ > + return vmlasq (m1, m2, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c > index 5708a0658a6..b80c3c7631f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmlas.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > -foo (uint32x4_t a, uint32x4_t b, uint32_t c) > +foo (uint32x4_t m1, uint32x4_t m2, uint32_t add) > { > - return vmlasq_n_u32 (a, b, c); > + return vmlasq_n_u32 (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmlas.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > -foo1 (uint32x4_t a, uint32x4_t b, uint32_t c) > +foo1 (uint32x4_t m1, uint32x4_t m2, uint32_t add) > { > - return vmlasq (a, b, c); > + return vmlasq (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.u32" } } */ > +/* > +**foo2: > +** ... > +** vmlas.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (uint32x4_t m1, uint32x4_t m2) > +{ > + return vmlasq (m1, m2, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c > index d83940c7232..0f37550160e 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmlas.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > -foo (uint8x16_t a, uint8x16_t b, uint8_t c) > +foo (uint8x16_t m1, uint8x16_t m2, uint8_t add) > { > - return vmlasq_n_u8 (a, b, c); > + return vmlasq_n_u8 (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmlas.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > -foo1 (uint8x16_t a, uint8x16_t b, uint8_t c) > +foo1 (uint8x16_t m1, uint8x16_t m2, uint8_t add) > { > - return vmlasq (a, b, c); > + return vmlasq (m1, m2, add); > } >=20 > -/* { dg-final { scan-assembler "vmlas.u8" } } */ > +/* > +**foo2: > +** ... > +** vmlas.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (uint8x16_t m1, uint8x16_t m2) > +{ > + return vmlasq (m1, m2, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > -- > 2.25.1