From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Philipp Tomsich <philipp.tomsich@vrull.eu>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Manolis Tsamis <manolis.tsamis@vrull.eu>,
Richard Sandiford <Richard.Sandiford@arm.com>,
Tamar Christina <Tamar.Christina@arm.com>
Subject: RE: [PATCH] aarch64: Update Ampere-1A (-mcpu=ampere1a) to include SM4
Date: Mon, 30 Jan 2023 14:18:24 +0000 [thread overview]
Message-ID: <PAXPR08MB69263E4355FF8489829405C493D39@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20230128231214.1257560-1-philipp.tomsich@vrull.eu>
> -----Original Message-----
> From: Gcc-patches <gcc-patches-
> bounces+kyrylo.tkachov=arm.com@gcc.gnu.org> On Behalf Of Philipp
> Tomsich
> Sent: Saturday, January 28, 2023 11:12 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Manolis Tsamis <manolis.tsamis@vrull.eu>; Richard Sandiford
> <Richard.Sandiford@arm.com>; Tamar Christina
> <Tamar.Christina@arm.com>; Philipp Tomsich <philipp.tomsich@vrull.eu>
> Subject: [PATCH] aarch64: Update Ampere-1A (-mcpu=ampere1a) to include
> SM4
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
> ampere1a to include SM4.
Ok, this looks consistent with what recently went in to LLVM.
Thanks,
Kyrill
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
> ---
>
> gcc/config/aarch64/aarch64-cores.def | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/config/aarch64/aarch64-cores.def
> b/gcc/config/aarch64/aarch64-cores.def
> index 2a0f52e1dd9..85fdfd8bf74 100644
> --- a/gcc/config/aarch64/aarch64-cores.def
> +++ b/gcc/config/aarch64/aarch64-cores.def
> @@ -70,7 +70,7 @@ AARCH64_CORE("thunderxt83", thunderxt83,
> thunderx, V8A, (CRC, CRYPTO), thu
>
> /* Ampere Computing ('\xC0') cores. */
> AARCH64_CORE("ampere1", ampere1, cortexa57, V8_6A, (F16, RNG, AES,
> SHA3), ampere1, 0xC0, 0xac3, -1)
> -AARCH64_CORE("ampere1a", ampere1a, cortexa57, V8_6A, (F16, RNG, AES,
> SHA3, MEMTAG), ampere1a, 0xC0, 0xac4, -1)
> +AARCH64_CORE("ampere1a", ampere1a, cortexa57, V8_6A, (F16, RNG, AES,
> SHA3, SM4, MEMTAG), ampere1a, 0xC0, 0xac4, -1)
> /* Do not swap around "emag" and "xgene1",
> this order is required to handle variant correctly. */
> AARCH64_CORE("emag", emag, xgene1, V8A, (CRC, CRYPTO), emag,
> 0x50, 0x000, 3)
> --
> 2.34.1
next prev parent reply other threads:[~2023-01-30 14:18 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-28 23:12 Philipp Tomsich
2023-01-30 14:18 ` Kyrylo Tkachov [this message]
2023-01-30 14:51 ` Philipp Tomsich
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