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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Nov 2022 16:37:41.6615 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ce9fde56-af58-4288-943e-08dac983366d X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT063.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB9848 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Andrea Corallo > Sent: Thursday, November 17, 2022 4:38 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov ; Richard Earnshaw > ; Andrea Corallo > Subject: [PATCH 06/35] arm: improve tests and fix vdupq* >=20 > gcc/ChangeLog: >=20 > * config/arm/mve.md (mve_vdupq_n_f) > (mve_vdupq_n_, mve_vdupq_m_n_) > (mve_vdupq_m_n_f): Fix spacing. >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Improve test. > * gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise. Ok. Thanks, Kyrill > --- > gcc/config/arm/mve.md | 8 ++-- > .../arm/mve/intrinsics/vdupq_m_n_f16.c | 41 +++++++++++++++++-- > .../arm/mve/intrinsics/vdupq_m_n_f32.c | 41 +++++++++++++++++-- > .../arm/mve/intrinsics/vdupq_m_n_s16.c | 25 +++++++++-- > .../arm/mve/intrinsics/vdupq_m_n_s32.c | 25 +++++++++-- > .../arm/mve/intrinsics/vdupq_m_n_s8.c | 25 +++++++++-- > .../arm/mve/intrinsics/vdupq_m_n_u16.c | 41 +++++++++++++++++-- > .../arm/mve/intrinsics/vdupq_m_n_u32.c | 41 +++++++++++++++++-- > .../arm/mve/intrinsics/vdupq_m_n_u8.c | 41 +++++++++++++++++-- > .../arm/mve/intrinsics/vdupq_n_f16.c | 21 +++++++++- > .../arm/mve/intrinsics/vdupq_n_f32.c | 21 +++++++++- > .../arm/mve/intrinsics/vdupq_n_s16.c | 13 ++++-- > .../arm/mve/intrinsics/vdupq_n_s32.c | 13 ++++-- > .../arm/mve/intrinsics/vdupq_n_s8.c | 9 +++- > .../arm/mve/intrinsics/vdupq_n_u16.c | 23 ++++++++++- > .../arm/mve/intrinsics/vdupq_n_u32.c | 23 ++++++++++- > .../arm/mve/intrinsics/vdupq_n_u8.c | 23 ++++++++++- > .../arm/mve/intrinsics/vdupq_x_n_f16.c | 30 +++++++++++++- > .../arm/mve/intrinsics/vdupq_x_n_f32.c | 30 +++++++++++++- > .../arm/mve/intrinsics/vdupq_x_n_s16.c | 14 ++++++- > .../arm/mve/intrinsics/vdupq_x_n_s32.c | 14 ++++++- > .../arm/mve/intrinsics/vdupq_x_n_s8.c | 14 ++++++- > .../arm/mve/intrinsics/vdupq_x_n_u16.c | 30 +++++++++++++- > .../arm/mve/intrinsics/vdupq_x_n_u32.c | 30 +++++++++++++- > .../arm/mve/intrinsics/vdupq_x_n_u8.c | 30 +++++++++++++- > 25 files changed, 567 insertions(+), 59 deletions(-) >=20 > diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md > index 58ffe03c499..6d5270281ec 100644 > --- a/gcc/config/arm/mve.md > +++ b/gcc/config/arm/mve.md > @@ -266,7 +266,7 @@ (define_insn "mve_vdupq_n_f" > VDUPQ_N_F)) > ] > "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" > - "vdup.%# %q0, %1" > + "vdup.%#\t%q0, %1" > [(set_attr "type" "mve_move") > ]) >=20 > @@ -435,7 +435,7 @@ (define_insn "mve_vdupq_n_" > VDUPQ_N)) > ] > "TARGET_HAVE_MVE" > - "vdup.%# %q0, %1" > + "vdup.%#\t%q0, %1" > [(set_attr "type" "mve_move") > ]) >=20 > @@ -3046,7 +3046,7 @@ (define_insn "mve_vdupq_m_n_" > VDUPQ_M_N)) > ] > "TARGET_HAVE_MVE" > - "vpst\;vdupt.%# %q0, %2" > + "vpst\;vdupt.%#\t%q0, %2" > [(set_attr "type" "mve_move") > (set_attr "length""8")]) >=20 > @@ -3991,7 +3991,7 @@ (define_insn "mve_vdupq_m_n_f" > VDUPQ_M_N_F)) > ] > "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" > - "vpst\;vdupt.%# %q0, %2" > + "vpst\;vdupt.%#\t%q0, %2" > [(set_attr "type" "mve_move") > (set_attr "length""8")]) >=20 > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c > index 0b749be3527..bfa471bcb31 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c > @@ -1,22 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float16x8_t > foo (float16x8_t inactive, float16_t a, mve_pred16_t p) > { > return vdupq_m_n_f16 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float16x8_t > foo1 (float16x8_t inactive, float16_t a, mve_pred16_t p) > { > return vdupq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float16x8_t > +foo2 (float16x8_t inactive, mve_pred16_t p) > +{ > + return vdupq_m (inactive, 1.1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c > index 9cca5310c7a..e1dd8f58ad0 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c > @@ -1,22 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float32x4_t > foo (float32x4_t inactive, float32_t a, mve_pred16_t p) > { > return vdupq_m_n_f32 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float32x4_t > foo1 (float32x4_t inactive, float32_t a, mve_pred16_t p) > { > return vdupq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float32x4_t > +foo2 (float32x4_t inactive, mve_pred16_t p) > +{ > + return vdupq_m (inactive, 1.1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c > index b521f13e94f..52304ace03a 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c > @@ -1,22 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t inactive, int16_t a, mve_pred16_t p) > { > return vdupq_m_n_s16 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t inactive, int16_t a, mve_pred16_t p) > { > return vdupq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c > index 96aa195dc18..44a80c5d5bc 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c > @@ -1,22 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int32_t a, mve_pred16_t p) > { > return vdupq_m_n_s32 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int32_t a, mve_pred16_t p) > { > return vdupq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c > index f1d222000c1..1630a3b9234 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c > @@ -1,22 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t inactive, int8_t a, mve_pred16_t p) > { > return vdupq_m_n_s8 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t inactive, int8_t a, mve_pred16_t p) > { > return vdupq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c > index 39d0c9f502d..d3df8b69248 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c > @@ -1,22 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t inactive, uint16_t a, mve_pred16_t p) > { > return vdupq_m_n_u16 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t inactive, uint16_t a, mve_pred16_t p) > { > return vdupq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (uint16x8_t inactive, mve_pred16_t p) > +{ > + return vdupq_m (inactive, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c > index fc107172e16..e6bb0cc2c38 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c > @@ -1,22 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p) > { > return vdupq_m_n_u32 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p) > { > return vdupq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (uint32x4_t inactive, mve_pred16_t p) > +{ > + return vdupq_m (inactive, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c > index 9fd3bc443cb..ad6f6d04ae3 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c > @@ -1,22 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t inactive, uint8_t a, mve_pred16_t p) > { > return vdupq_m_n_u8 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t inactive, uint8_t a, mve_pred16_t p) > { > return vdupq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (uint8x16_t inactive, mve_pred16_t p) > +{ > + return vdupq_m (inactive, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c > index 62bfc194533..fc5a7933653 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c > @@ -1,13 +1,32 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float16x8_t > foo (float16_t a) > { > return vdupq_n_f16 (a); > } >=20 > -/* { dg-final { scan-assembler "vdup.16" } } */ > +/* > +**foo1: > +** ... > +** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float16x8_t > +foo1 () > +{ > + return vdupq_n_f16 (1.1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c > index f5ad2286d8d..a6be82e5927 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c > @@ -1,13 +1,32 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float32x4_t > foo (float32_t a) > { > return vdupq_n_f32 (a); > } >=20 > -/* { dg-final { scan-assembler "vdup.32" } } */ > +/* > +**foo1: > +** ... > +** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float32x4_t > +foo1 () > +{ > + return vdupq_n_f32 (1.1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c > index 1378522a18e..f842b96c3b1 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c > @@ -1,13 +1,20 @@ > -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > -/* { dg-add-options arm_v8_1m_mve_fp } */ > +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ > +/* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16_t a) > { > return vdupq_n_s16 (a); > } >=20 > -/* { dg-final { scan-assembler "vdup.16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c > index 43affe856c0..05cbff8fdae 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c > @@ -1,13 +1,20 @@ > -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > -/* { dg-add-options arm_v8_1m_mve_fp } */ > +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ > +/* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32_t a) > { > return vdupq_n_s32 (a); > } >=20 > -/* { dg-final { scan-assembler "vdup.32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c > index 3f934dc5d59..1d141161604 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c > @@ -1,13 +1,20 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vdup.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8_t a) > { > return vdupq_n_s8 (a); > } >=20 > -/* { dg-final { scan-assembler "vdup.8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c > index 93268643fec..4839d427e65 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c > @@ -1,13 +1,32 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16_t a) > { > - return vdupq_n_u16 (a); > + return vdupq_n_u16 (a); > } >=20 > -/* { dg-final { scan-assembler "vdup.16" } } */ > +/* > +**foo1: > +** ... > +** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo1 () > +{ > + return vdupq_n_u16 (1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c > index 276e9ddc67f..f0069eb7280 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c > @@ -1,13 +1,32 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32_t a) > { > - return vdupq_n_u32 (a); > + return vdupq_n_u32 (a); > } >=20 > -/* { dg-final { scan-assembler "vdup.32" } } */ > +/* > +**foo1: > +** ... > +** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo1 () > +{ > + return vdupq_n_u32 (1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c > index d0361c15047..fe26687ae45 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c > @@ -1,13 +1,32 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vdup.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8_t a) > { > - return vdupq_n_u8 (a); > + return vdupq_n_u8 (a); > } >=20 > -/* { dg-final { scan-assembler "vdup.8" } } */ > +/* > +**foo1: > +** ... > +** vdup.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo1 () > +{ > + return vdupq_n_u8 (1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c > index c91ee62791c..11ebb47f94f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c > @@ -1,14 +1,40 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float16x8_t > foo (float16_t a, mve_pred16_t p) > { > return vdupq_x_n_f16 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.16" } } */ > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float16x8_t > +foo1 (mve_pred16_t p) > +{ > + return vdupq_x_n_f16 (1.1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c > index c2b39051f5b..4e79bd54f71 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c > @@ -1,14 +1,40 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float32x4_t > foo (float32_t a, mve_pred16_t p) > { > return vdupq_x_n_f32 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.32" } } */ > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float32x4_t > +foo1 (mve_pred16_t p) > +{ > + return vdupq_x_n_f32 (1.1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c > index cc8a5bfeca1..90288777df7 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c > @@ -1,14 +1,24 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16_t a, mve_pred16_t p) > { > return vdupq_x_n_s16 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c > index b3ed3eb68e8..c4c906e0682 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c > @@ -1,14 +1,24 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32_t a, mve_pred16_t p) > { > return vdupq_x_n_s32 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c > index 3be865dcc84..6234730827e 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c > @@ -1,14 +1,24 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8_t a, mve_pred16_t p) > { > return vdupq_x_n_s8 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c > index d01338aeb91..821fcddcab1 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c > @@ -1,14 +1,40 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16_t a, mve_pred16_t p) > { > return vdupq_x_n_u16 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.16" } } */ > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo1 (mve_pred16_t p) > +{ > + return vdupq_x_n_u16 (1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c > index 8fa7d4552bc..20125df6226 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c > @@ -1,14 +1,40 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32_t a, mve_pred16_t p) > { > return vdupq_x_n_u32 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.32" } } */ > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo1 (mve_pred16_t p) > +{ > + return vdupq_x_n_u32 (1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c > index 96ad899c9c2..defaaeebfcf 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c > @@ -1,14 +1,40 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8_t a, mve_pred16_t p) > { > return vdupq_x_n_u8 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vdupt.8" } } */ > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo1 (mve_pred16_t p) > +{ > + return vdupq_x_n_u8 (1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > -- > 2.25.1