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Thu, 16 Nov 2023 16:48:30 +0000 From: Kyrylo Tkachov To: Christophe Lyon , "gcc-patches@gcc.gnu.org" , Richard Sandiford , Richard Earnshaw Subject: RE: [PATCH 3/6] arm: [MVE intrinsics] Add support for contiguous loads and stores Thread-Topic: [PATCH 3/6] arm: [MVE intrinsics] Add support for contiguous loads and stores Thread-Index: AQHaGKFYrv/czFS0ZEyhwO1P0QWr5bB9KChA Date: Thu, 16 Nov 2023 16:48:30 +0000 Message-ID: References: <20231116152617.2193377-1-christophe.lyon@linaro.org> <20231116152617.2193377-3-christophe.lyon@linaro.org> In-Reply-To: <20231116152617.2193377-3-christophe.lyon@linaro.org> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; x-ms-traffictypediagnostic: PAXPR08MB6926:EE_|DB9PR08MB8457:EE_|AM3PEPF0000A792:EE_|DU0PR08MB8424:EE_ X-MS-Office365-Filtering-Correlation-Id: 4a09bde9-f752-4dfc-4324-08dbe6c3e5a7 x-checkrecipientrouted: true nodisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Nov 2023 16:48:44.8231 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4a09bde9-f752-4dfc-4324-08dbe6c3e5a7 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM3PEPF0000A792.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB8424 X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Christophe Lyon > Sent: Thursday, November 16, 2023 3:26 PM > To: gcc-patches@gcc.gnu.org; Richard Sandiford > ; Richard Earnshaw > ; Kyrylo Tkachov > Cc: Christophe Lyon > Subject: [PATCH 3/6] arm: [MVE intrinsics] Add support for contiguous loa= ds > and stores >=20 > This patch adds base support for load/store intrinsics to the > framework, starting with loads and stores for contiguous memory > elements, without extension nor truncation. >=20 > Compared to the aarch64/SVE implementation, there's no support for > gather/scatter loads/stores yet. This will be added later as needed. >=20 Ok. Thanks, Kyrill > 2023-11-16 Christophe Lyon >=20 > gcc/ > * config/arm/arm-mve-builtins-functions.h (multi_vector_function) > (full_width_access): New classes. > * config/arm/arm-mve-builtins.cc > (find_type_suffix_for_scalar_type, infer_pointer_type) > (require_pointer_type, get_contiguous_base, add_mem_operand) > (add_fixed_operand, use_contiguous_load_insn) > (use_contiguous_store_insn): New. > * config/arm/arm-mve-builtins.h (memory_vector_mode) > (infer_pointer_type, require_pointer_type, get_contiguous_base) > (add_mem_operand) > (add_fixed_operand, use_contiguous_load_insn) > (use_contiguous_store_insn): New. > --- > gcc/config/arm/arm-mve-builtins-functions.h | 56 ++++++++++ > gcc/config/arm/arm-mve-builtins.cc | 116 ++++++++++++++++++++ > gcc/config/arm/arm-mve-builtins.h | 28 ++++- > 3 files changed, 199 insertions(+), 1 deletion(-) >=20 > diff --git a/gcc/config/arm/arm-mve-builtins-functions.h > b/gcc/config/arm/arm-mve-builtins-functions.h > index eba1f071af0..6d234a2dd7c 100644 > --- a/gcc/config/arm/arm-mve-builtins-functions.h > +++ b/gcc/config/arm/arm-mve-builtins-functions.h > @@ -966,6 +966,62 @@ public: > } > }; >=20 > +/* A function_base that sometimes or always operates on tuples of > + vectors. */ > +class multi_vector_function : public function_base > +{ > +public: > + CONSTEXPR multi_vector_function (unsigned int vectors_per_tuple) > + : m_vectors_per_tuple (vectors_per_tuple) {} > + > + unsigned int > + vectors_per_tuple () const override > + { > + return m_vectors_per_tuple; > + } > + > + /* The number of vectors in a tuple, or 1 if the function only operate= s > + on single vectors. */ > + unsigned int m_vectors_per_tuple; > +}; > + > +/* A function_base that loads or stores contiguous memory elements > + without extending or truncating them. */ > +class full_width_access : public multi_vector_function > +{ > +public: > + CONSTEXPR full_width_access (unsigned int vectors_per_tuple =3D 1) > + : multi_vector_function (vectors_per_tuple) {} > + > + tree > + memory_scalar_type (const function_instance &fi) const override > + { > + return fi.scalar_type (0); > + } > + > + machine_mode > + memory_vector_mode (const function_instance &fi) const override > + { > + machine_mode mode =3D fi.vector_mode (0); > + /* Vectors of floating-point are managed in memory as vectors of > + integers. */ > + switch (mode) > + { > + case E_V4SFmode: > + mode =3D E_V4SImode; > + break; > + case E_V8HFmode: > + mode =3D E_V8HImode; > + break; > + } > + > + if (m_vectors_per_tuple !=3D 1) > + mode =3D targetm.array_mode (mode, m_vectors_per_tuple).require ()= ; > + > + return mode; > + } > +}; > + > } /* end namespace arm_mve */ >=20 > /* Declare the global function base NAME, creating it from an instance > diff --git a/gcc/config/arm/arm-mve-builtins.cc b/gcc/config/arm/arm-mve- > builtins.cc > index 02dc8fa9b73..a265cb05553 100644 > --- a/gcc/config/arm/arm-mve-builtins.cc > +++ b/gcc/config/arm/arm-mve-builtins.cc > @@ -36,6 +36,7 @@ > #include "fold-const.h" > #include "gimple.h" > #include "gimple-iterator.h" > +#include "explow.h" > #include "emit-rtl.h" > #include "langhooks.h" > #include "stringpool.h" > @@ -529,6 +530,22 @@ matches_type_p (const_tree model_type, const_tree > candidate) > && TYPE_MAIN_VARIANT (model_type) =3D=3D TYPE_MAIN_VARIANT > (candidate)); > } >=20 > +/* If TYPE is a valid MVE element type, return the corresponding type > + suffix, otherwise return NUM_TYPE_SUFFIXES. */ > +static type_suffix_index > +find_type_suffix_for_scalar_type (const_tree type) > +{ > + /* A linear search should be OK here, since the code isn't hot and > + the number of types is only small. */ > + for (unsigned int suffix_i =3D 0; suffix_i < NUM_TYPE_SUFFIXES; ++suff= ix_i) > + { > + vector_type_index vector_i =3D type_suffixes[suffix_i].vector_type; > + if (matches_type_p (scalar_types[vector_i], type)) > + return type_suffix_index (suffix_i); > + } > + return NUM_TYPE_SUFFIXES; > +} > + > /* Report an error against LOCATION that the user has tried to use > a floating point function when the mve.fp extension is disabled. */ > static void > @@ -1125,6 +1142,37 @@ function_resolver::resolve_to (mode_suffix_index > mode, > return res; > } >=20 > +/* Require argument ARGNO to be a pointer to a scalar type that has a > + corresponding type suffix. Return that type suffix on success, > + otherwise report an error and return NUM_TYPE_SUFFIXES. */ > +type_suffix_index > +function_resolver::infer_pointer_type (unsigned int argno) > +{ > + tree actual =3D get_argument_type (argno); > + if (actual =3D=3D error_mark_node) > + return NUM_TYPE_SUFFIXES; > + > + if (TREE_CODE (actual) !=3D POINTER_TYPE) > + { > + error_at (location, "passing %qT to argument %d of %qE, which" > + " expects a pointer type", actual, argno + 1, fndecl); > + return NUM_TYPE_SUFFIXES; > + } > + > + tree target =3D TREE_TYPE (actual); > + type_suffix_index type =3D find_type_suffix_for_scalar_type (target); > + if (type =3D=3D NUM_TYPE_SUFFIXES) > + { > + error_at (location, "passing %qT to argument %d of %qE, but %qT is= not" > + " a valid MVE element type", actual, argno + 1, fndecl, > + build_qualified_type (target, 0)); > + return NUM_TYPE_SUFFIXES; > + } > + unsigned int bits =3D type_suffixes[type].element_bits; > + > + return type; > +} > + > /* Require argument ARGNO to be a single vector or a tuple of > NUM_VECTORS > vectors; NUM_VECTORS is 1 for the former. Return the associated type > suffix on success, using TYPE_SUFFIX_b for predicates. Report an err= or > @@ -1498,6 +1546,22 @@ function_resolver::require_scalar_type (unsigned > int argno, > return true; > } >=20 > +/* Require argument ARGNO to be some form of pointer, without being > specific > + about its target type. Return true if the argument has the right for= m, > + otherwise report an appropriate error. */ > +bool > +function_resolver::require_pointer_type (unsigned int argno) > +{ > + if (!scalar_argument_p (argno)) > + { > + error_at (location, "passing %qT to argument %d of %qE, which" > + " expects a scalar pointer", get_argument_type (argno), > + argno + 1, fndecl); > + return false; > + } > + return true; > +} > + > /* Require the function to have exactly EXPECTED arguments. Return true > if it does, otherwise report an appropriate error. */ > bool > @@ -1955,6 +2019,14 @@ function_expander::direct_optab_handler (optab > op, unsigned int suffix_i) > return ::direct_optab_handler (op, vector_mode (suffix_i)); > } >=20 > +/* Return the base address for a contiguous load or store > + function. */ > +rtx > +function_expander::get_contiguous_base () > +{ > + return args[0]; > +} > + > /* For a function that does the equivalent of: >=20 > OUTPUT =3D COND ? FN (INPUTS) : FALLBACK; > @@ -2043,6 +2115,26 @@ function_expander::add_integer_operand > (HOST_WIDE_INT x) > create_integer_operand (&m_ops.last (), x); > } >=20 > +/* Add a memory operand with mode MODE and address ADDR. */ > +void > +function_expander::add_mem_operand (machine_mode mode, rtx addr) > +{ > + gcc_assert (VECTOR_MODE_P (mode)); > + rtx mem =3D gen_rtx_MEM (mode, memory_address (mode, addr)); > + /* The memory is only guaranteed to be element-aligned. */ > + set_mem_align (mem, GET_MODE_ALIGNMENT (GET_MODE_INNER > (mode))); > + add_fixed_operand (mem); > +} > + > +/* Add an operand that must be X. The only way of legitimizing an > + invalid X is to reload the address of a MEM. */ > +void > +function_expander::add_fixed_operand (rtx x) > +{ > + m_ops.safe_grow (m_ops.length () + 1, true); > + create_fixed_operand (&m_ops.last (), x); > +} > + > /* Generate instruction ICODE, given that its operands have already > been added to M_OPS. Return the value of the first operand. */ > rtx > @@ -2137,6 +2229,30 @@ function_expander::use_cond_insn (insn_code > icode, unsigned int merge_argno) > return generate_insn (icode); > } >=20 > +/* Implement the call using instruction ICODE, which loads memory operan= d > 1 > + into register operand 0. */ > +rtx > +function_expander::use_contiguous_load_insn (insn_code icode) > +{ > + machine_mode mem_mode =3D memory_vector_mode (); > + > + add_output_operand (icode); > + add_mem_operand (mem_mode, get_contiguous_base ()); > + return generate_insn (icode); > +} > + > +/* Implement the call using instruction ICODE, which stores register ope= rand > 1 > + into memory operand 0. */ > +rtx > +function_expander::use_contiguous_store_insn (insn_code icode) > +{ > + machine_mode mem_mode =3D memory_vector_mode (); > + > + add_mem_operand (mem_mode, get_contiguous_base ()); > + add_input_operand (icode, args[1]); > + return generate_insn (icode); > +} > + > /* Implement the call using a normal unpredicated optab for PRED_none. >=20 > corresponds to: > diff --git a/gcc/config/arm/arm-mve-builtins.h b/gcc/config/arm/arm-mve- > builtins.h > index 4fd230fe4c7..9c219fa8db4 100644 > --- a/gcc/config/arm/arm-mve-builtins.h > +++ b/gcc/config/arm/arm-mve-builtins.h > @@ -278,6 +278,7 @@ public: >=20 > unsigned int vectors_per_tuple () const; > tree memory_scalar_type () const; > + machine_mode memory_vector_mode () const; >=20 > const mode_suffix_info &mode_suffix () const; >=20 > @@ -383,6 +384,7 @@ public: > type_suffix_index =3D NUM_TYPE_SUFFIXES, > type_suffix_index =3D NUM_TYPE_SUFFIXES); >=20 > + type_suffix_index infer_pointer_type (unsigned int); > type_suffix_index infer_vector_or_tuple_type (unsigned int, unsigned i= nt); > type_suffix_index infer_vector_type (unsigned int); >=20 > @@ -394,8 +396,9 @@ public: > type_suffix_index, > type_class_index =3D SAME_TYPE_CLASS, > unsigned int =3D SAME_SIZE); > - bool require_integer_immediate (unsigned int); > bool require_scalar_type (unsigned int, const char *); > + bool require_pointer_type (unsigned int); > + bool require_integer_immediate (unsigned int); > bool require_derived_scalar_type (unsigned int, type_class_index, > unsigned int =3D SAME_SIZE); >=20 > @@ -476,18 +479,23 @@ public: >=20 > insn_code direct_optab_handler (optab, unsigned int =3D 0); >=20 > + rtx get_contiguous_base (); > rtx get_fallback_value (machine_mode, unsigned int, unsigned int &); > rtx get_reg_target (); >=20 > void add_output_operand (insn_code); > void add_input_operand (insn_code, rtx); > void add_integer_operand (HOST_WIDE_INT); > + void add_mem_operand (machine_mode, rtx); > + void add_fixed_operand (rtx); > rtx generate_insn (insn_code); >=20 > rtx use_exact_insn (insn_code); > rtx use_unpred_insn (insn_code); > rtx use_pred_x_insn (insn_code); > rtx use_cond_insn (insn_code, unsigned int =3D DEFAULT_MERGE_ARGNO); > + rtx use_contiguous_load_insn (insn_code); > + rtx use_contiguous_store_insn (insn_code); >=20 > rtx map_to_rtx_codes (rtx_code, rtx_code, rtx_code); >=20 > @@ -528,6 +536,15 @@ public: > gcc_unreachable (); > } >=20 > + /* If the function addresses memory, return a vector mode whose > + GET_MODE_NUNITS is the number of elements addressed and whose > + GET_MODE_INNER is the mode of a single scalar memory element. */ > + virtual machine_mode > + memory_vector_mode (const function_instance &) const > + { > + gcc_unreachable (); > + } > + > /* Try to fold the given gimple call. Return the new gimple statement > on success, otherwise return null. */ > virtual gimple *fold (gimple_folder &) const { return NULL; } > @@ -661,6 +678,15 @@ function_instance::memory_scalar_type () const > return base->memory_scalar_type (*this); > } >=20 > +/* If the function addresses memory, return a vector mode whose > + GET_MODE_NUNITS is the number of elements addressed and whose > + GET_MODE_INNER is the mode of a single scalar memory element. */ > +inline machine_mode > +function_instance::memory_vector_mode () const > +{ > + return base->memory_vector_mode (*this); > +} > + > /* Return information about the function's mode suffix. */ > inline const mode_suffix_info & > function_instance::mode_suffix () const > -- > 2.34.1