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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Nov 2022 16:54:37.6515 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: aef399d0-5907-46dd-5c86-08daccaa3da8 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT052.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR08MB6417 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Andrea Corallo > Sent: Thursday, November 17, 2022 4:38 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov ; Richard Earnshaw > ; Andrea Corallo > Subject: [PATCH 23/35] arm: improve tests for viwdupq* >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Improve tests. > * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise. Ok. Thanks, Kyrill > --- > .../arm/mve/intrinsics/viwdupq_m_n_u16.c | 46 ++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_m_n_u32.c | 46 ++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_m_n_u8.c | 46 ++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 46 ++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 46 ++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 46 ++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_n_u16.c | 32 ++++++++++-- > .../arm/mve/intrinsics/viwdupq_n_u32.c | 32 ++++++++++-- > .../arm/mve/intrinsics/viwdupq_n_u8.c | 28 ++++++++++- > .../arm/mve/intrinsics/viwdupq_wb_u16.c | 36 ++++++++++--- > .../arm/mve/intrinsics/viwdupq_wb_u32.c | 36 ++++++++++--- > .../arm/mve/intrinsics/viwdupq_wb_u8.c | 36 ++++++++++--- > .../arm/mve/intrinsics/viwdupq_x_n_u16.c | 46 ++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_x_n_u32.c | 46 ++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_x_n_u8.c | 46 ++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_x_wb_u16.c | 50 ++++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_x_wb_u32.c | 50 ++++++++++++++++--- > .../arm/mve/intrinsics/viwdupq_x_wb_u8.c | 50 ++++++++++++++++--- > 18 files changed, 658 insertions(+), 106 deletions(-) >=20 > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c > index 0f999cc672b..67a2465f435 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m_n_u16 (inactive, a, b, 2, p); > + return viwdupq_m_n_u16 (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m (inactive, a, b, 2, p); > + return viwdupq_m (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (uint16x8_t inactive, mve_pred16_t p) > +{ > + return viwdupq_m (inactive, 1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c > index f79c91eaf4c..9fc2518acc5 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m_n_u32 (inactive, a, b, 4, p); > + return viwdupq_m_n_u32 (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m (inactive, a, b, 4, p); > + return viwdupq_m (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (uint32x4_t inactive, mve_pred16_t p) > +{ > + return viwdupq_m (inactive, 1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c > index c0fee9fa752..39f4071bfa1 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m_n_u8 (inactive, a, b, 8, p); > + return viwdupq_m_n_u8 (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m (inactive, a, b, 8, p); > + return viwdupq_m (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u8" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (uint8x16_t inactive, mve_pred16_t p) > +{ > + return viwdupq_m (inactive, 1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git > a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c > index 468ba179f62..8bb680e0d77 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m_wb_u16 (inactive, a, b, 2, p); > + return viwdupq_m_wb_u16 (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m (inactive, a, b, 2, p); > + return viwdupq_m (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (uint16x8_t inactive, mve_pred16_t p) > +{ > + return viwdupq_m (inactive, 1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git > a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c > index e9190302717..2dc8d5f3442 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m_wb_u32 (inactive, a, b, 4, p); > + return viwdupq_m_wb_u32 (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m (inactive, a, b, 4, p); > + return viwdupq_m (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (uint32x4_t inactive, mve_pred16_t p) > +{ > + return viwdupq_m (inactive, 1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c > index 309ce95a333..ff3a5f520e8 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m_wb_u8 (inactive, a, b, 8, p); > + return viwdupq_m_wb_u8 (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_m (inactive, a, b, 8, p); > + return viwdupq_m (inactive, a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u8" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (uint8x16_t inactive, mve_pred16_t p) > +{ > + return viwdupq_m (inactive, 1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c > index 599d9078464..5f37290759a 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > foo (uint32_t a, uint32_t b) > { > - return viwdupq_n_u16 (a, b, 2); > + return viwdupq_n_u16 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint32_t a, uint32_t b) > { > - return viwdupq_u16 (a, b, 2); > + return viwdupq_u16 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u16" } } */ > +/* > +**foo2: > +** ... > +** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 () > +{ > + return viwdupq_u16 (1, 1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c > index 7c2af74b3f0..de93f8a7ec4 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32_t a, uint32_t b) > { > - return viwdupq_n_u32 (a, b, 4); > + return viwdupq_n_u32 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32_t a, uint32_t b) > { > - return viwdupq_u32 (a, b, 4); > + return viwdupq_u32 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u32" } } */ > +/* > +**foo2: > +** ... > +** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 () > +{ > + return viwdupq_u32 (1, 1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c > index 4ff60791f3b..089025c3401 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > foo (uint32_t a, uint32_t b) > { > return viwdupq_n_u8 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint32_t a, uint32_t b) > { > return viwdupq_u8 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u8" } } */ > +/* > +**foo2: > +** ... > +** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 () > +{ > + return viwdupq_u8 (1, 1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c > index 1e5ce88dcca..fc3e9c6fac4 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > -foo (uint32_t * a, uint32_t b) > +foo (uint32_t *a, uint32_t b) > { > - return viwdupq_wb_u16 (a, b, 4); > + return viwdupq_wb_u16 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > -foo1 (uint32_t * a, uint32_t b) > +foo1 (uint32_t *a, uint32_t b) > { > - return viwdupq_u16 (a, b, 4); > + return viwdupq_u16 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u16" } } */ > +/* > +**foo2: > +** ... > +** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 () > +{ > + return viwdupq_u16 (1, 1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c > index 0c076f7b751..4c098dd8f02 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > -foo (uint32_t * a, uint32_t b) > +foo (uint32_t *a, uint32_t b) > { > - return viwdupq_wb_u32 (a, b, 8); > + return viwdupq_wb_u32 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > -foo1 (uint32_t * a, uint32_t b) > +foo1 (uint32_t *a, uint32_t b) > { > - return viwdupq_u32 (a, b, 8); > + return viwdupq_u32 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u32" } } */ > +/* > +**foo2: > +** ... > +** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 () > +{ > + return viwdupq_u32 (1, 1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c > index 9e5118ba2b6..44cb53fe344 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > -foo (uint32_t * a, uint32_t b) > +foo (uint32_t *a, uint32_t b) > { > - return viwdupq_wb_u8 (a, b, 2); > + return viwdupq_wb_u8 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > -foo1 (uint32_t * a, uint32_t b) > +foo1 (uint32_t *a, uint32_t b) > { > - return viwdupq_u8 (a, b, 2); > + return viwdupq_u8 (a, b, 1); > } >=20 > -/* { dg-final { scan-assembler "viwdup.u8" } } */ > +/* > +**foo2: > +** ... > +** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 () > +{ > + return viwdupq_u8 (1, 1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c > index fdaf6be282d..2242877881f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > foo (uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_n_u16 (a, b, 2, p); > + return viwdupq_x_n_u16 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_u16 (a, b, 2, p); > + return viwdupq_x_u16 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (mve_pred16_t p) > +{ > + return viwdupq_x_u16 (1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c > index affc6162015..4b2b650e21a 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_n_u32 (a, b, 4, p); > + return viwdupq_x_n_u32 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_u32 (a, b, 4, p); > + return viwdupq_x_u32 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (mve_pred16_t p) > +{ > + return viwdupq_x_u32 (1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c > index 8137c623c2a..873952b6c2e 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > foo (uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_n_u8 (a, b, 8, p); > + return viwdupq_x_n_u8 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint32_t a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_u8 (a, b, 8, p); > + return viwdupq_x_u8 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u8" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (mve_pred16_t p) > +{ > + return viwdupq_x_u8 (1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16= .c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c > index d7aa141f384..b6c94797380 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > -foo (uint32_t * a, uint32_t b, mve_pred16_t p) > +foo (uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_wb_u16 (a, b, 8, p); > + return viwdupq_x_wb_u16 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint16x8_t > -foo1 (uint32_t * a, uint32_t b, mve_pred16_t p) > +foo1 (uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_u16 (a, b, 8, p); > + return viwdupq_x_u16 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (mve_pred16_t p) > +{ > + return viwdupq_x_u16 (1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32= .c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c > index 7fe56963452..5fd84963d01 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > -foo (uint32_t * a, uint32_t b, mve_pred16_t p) > +foo (uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_wb_u32 (a, b, 2, p); > + return viwdupq_x_wb_u32 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint32x4_t > -foo1 (uint32_t * a, uint32_t b, mve_pred16_t p) > +foo1 (uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_u32 (a, b, 2, p); > + return viwdupq_x_u32 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (mve_pred16_t p) > +{ > + return viwdupq_x_u32 (1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c > index 8e3ecefdedb..abbb40fa8da 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > -foo (uint32_t * a, uint32_t b, mve_pred16_t p) > +foo (uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_wb_u8 (a, b, 4, p); > + return viwdupq_x_wb_u8 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > uint8x16_t > -foo1 (uint32_t * a, uint32_t b, mve_pred16_t p) > +foo1 (uint32_t *a, uint32_t b, mve_pred16_t p) > { > - return viwdupq_x_u8 (a, b, 4, p); > + return viwdupq_x_u8 (a, b, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "viwdupt.u8" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: > @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (mve_pred16_t p) > +{ > + return viwdupq_x_u8 (1, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > -- > 2.25.1