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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Jul 2023 15:44:19.9131 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e0582225-14fb-403e-84fc-08db84813050 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT048.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR08MB8497 X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Christophe Lyon > Sent: Thursday, July 13, 2023 11:22 AM > To: gcc-patches@gcc.gnu.org; Kyrylo Tkachov ; > Richard Earnshaw > Cc: Christophe Lyon > Subject: [PATCH 2/2] [testsuite,arm]: Make mve_fp_fpu[12].c accept single= or > double precision FPU >=20 > This tests currently expect a directive containing .fpu fpv5-sp-d16 > and thus may fail if the test is executed for instance with > -march=3Darmv8.1-m.main+mve.fp+fp.dp >=20 > This patch accepts either fpv5-sp-d16 or fpv5-d16 to avoid the failure. >=20 Ok. Thanks, Kyrill > 2023-06-28 Christophe Lyon >=20 > gcc/testsuite/ > * gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c: Fix .fpu > scan-assembler. > * gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c: Likewise. > --- > gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c | 2 +- > gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c > index e375327fb97..8358a616bb5 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c > @@ -12,4 +12,4 @@ foo1 (int8x16_t value) > return b; > } >=20 > -/* { dg-final { scan-assembler "\.fpu fpv5-sp-d16" } } */ > +/* { dg-final { scan-assembler "\.fpu fpv5(-sp|)-d16" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c > index 1fca1100cf0..5dd2feefc35 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c > @@ -12,4 +12,4 @@ foo1 (int8x16_t value) > return b; > } >=20 > -/* { dg-final { scan-assembler "\.fpu fpv5-sp-d16" } } */ > +/* { dg-final { scan-assembler "\.fpu fpv5(-sp|)-d16" } } */ > -- > 2.34.1