From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Christophe Lyon <Christophe.Lyon@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
Richard Sandiford <Richard.Sandiford@arm.com>
Cc: Christophe Lyon <Christophe.Lyon@arm.com>
Subject: RE: [PATCH 22/23] arm: [MVE intrinsics] factorize vsrhrq vrshrq
Date: Fri, 5 May 2023 11:06:22 +0000 [thread overview]
Message-ID: <PAXPR08MB692674FB7FA970BCCE94E4F793729@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20230505083930.101210-22-christophe.lyon@arm.com>
> -----Original Message-----
> From: Christophe Lyon <christophe.lyon@arm.com>
> Sent: Friday, May 5, 2023 9:39 AM
> To: gcc-patches@gcc.gnu.org; Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>;
> Richard Earnshaw <Richard.Earnshaw@arm.com>; Richard Sandiford
> <Richard.Sandiford@arm.com>
> Cc: Christophe Lyon <Christophe.Lyon@arm.com>
> Subject: [PATCH 22/23] arm: [MVE intrinsics] factorize vsrhrq vrshrq
>
> Factorize vsrhrq vrshrq so that they use the same pattern.
Ok.
Thanks,
Kyrill
>
> 2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
>
> gcc/
> * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
> (mve_insn): Add vrshr, vshr.
> * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
> (mve_vrshrq_n_<supf><mode>): Merge into ...
> (@mve_<mve_insn>q_n_<supf><mode>): ... this.
> (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>):
> Merge
> into ...
> (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
> ---
> gcc/config/arm/iterators.md | 14 +++++++++++
> gcc/config/arm/mve.md | 46 +++++++------------------------------
> 2 files changed, 22 insertions(+), 38 deletions(-)
>
> diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
> index 583206dac9e..53873704174 100644
> --- a/gcc/config/arm/iterators.md
> +++ b/gcc/config/arm/iterators.md
> @@ -408,6 +408,16 @@ (define_int_iterator MVE_INT_N_BINARY [
> VSUBQ_N_S VSUBQ_N_U
> ])
>
> +(define_int_iterator MVE_VSHRQ_M_N [
> + VRSHRQ_M_N_S VRSHRQ_M_N_U
> + VSHRQ_M_N_S VSHRQ_M_N_U
> + ])
> +
> +(define_int_iterator MVE_VSHRQ_N [
> + VRSHRQ_N_S VRSHRQ_N_U
> + VSHRQ_N_S VSHRQ_N_U
> + ])
> +
> (define_int_iterator MVE_INT_SU_N_BINARY [
> VHADDQ_N_S VHADDQ_N_U
> VHSUBQ_N_S VHSUBQ_N_U
> @@ -636,6 +646,8 @@ (define_int_attr mve_insn [
> (VRSHRNBQ_N_S "vrshrnb") (VRSHRNBQ_N_U "vrshrnb")
> (VRSHRNTQ_M_N_S "vrshrnt") (VRSHRNTQ_M_N_U
> "vrshrnt")
> (VRSHRNTQ_N_S "vrshrnt") (VRSHRNTQ_N_U "vrshrnt")
> + (VRSHRQ_M_N_S "vrshr") (VRSHRQ_M_N_U "vrshr")
> + (VRSHRQ_N_S "vrshr") (VRSHRQ_N_U "vrshr")
> (VSHLQ_M_N_S "vshl") (VSHLQ_M_N_U "vshl")
> (VSHLQ_M_R_S "vshl") (VSHLQ_M_R_U "vshl")
> (VSHLQ_M_S "vshl") (VSHLQ_M_U "vshl")
> @@ -646,6 +658,8 @@ (define_int_attr mve_insn [
> (VSHRNBQ_N_S "vshrnb") (VSHRNBQ_N_U "vshrnb")
> (VSHRNTQ_M_N_S "vshrnt") (VSHRNTQ_M_N_U "vshrnt")
> (VSHRNTQ_N_S "vshrnt") (VSHRNTQ_N_U "vshrnt")
> + (VSHRQ_M_N_S "vshr") (VSHRQ_M_N_U "vshr")
> + (VSHRQ_N_S "vshr") (VSHRQ_N_U "vshr")
> (VSUBQ_M_N_S "vsub") (VSUBQ_M_N_U "vsub")
> (VSUBQ_M_N_F "vsub")
> (VSUBQ_M_S "vsub") (VSUBQ_M_U "vsub") (VSUBQ_M_F
> "vsub")
> (VSUBQ_N_S "vsub") (VSUBQ_N_U "vsub") (VSUBQ_N_F
> "vsub")
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 20ce7ecb3d6..b5c89fd4105 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -728,18 +728,19 @@ (define_insn
> "@mve_<mve_insn>q_<supf><mode>"
> (set_attr "length""8")])
>
> ;;
> -;; [vshrq_n_s, vshrq_n_u])
> +;; [vrshrq_n_s, vrshrq_n_u]
> +;; [vshrq_n_s, vshrq_n_u]
> ;;
> ;; Version that takes an immediate as operand 2.
> -(define_insn "mve_vshrq_n_<supf><mode>"
> +(define_insn "@mve_<mve_insn>q_n_<supf><mode>"
> [
> (set (match_operand:MVE_2 0 "s_register_operand" "=w")
> (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand"
> "w")
> (match_operand:SI 2 "<MVE_pred2>"
> "<MVE_constraint2>")]
> - VSHRQ_N))
> + MVE_VSHRQ_N))
> ]
> "TARGET_HAVE_MVE"
> - "vshr.<supf><V_sz_elem>\t%q0, %q1, %2"
> + "<mve_insn>.<supf><V_sz_elem>\t%q0, %q1, %2"
> [(set_attr "type" "mve_move")
> ])
>
> @@ -1401,21 +1402,6 @@ (define_insn "mve_vqshluq_n_s<mode>"
> [(set_attr "type" "mve_move")
> ])
>
> -;;
> -;; [vrshrq_n_s, vrshrq_n_u])
> -;;
> -(define_insn "mve_vrshrq_n_<supf><mode>"
> - [
> - (set (match_operand:MVE_2 0 "s_register_operand" "=w")
> - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand"
> "w")
> - (match_operand:SI 2 "<MVE_pred2>"
> "<MVE_constraint2>")]
> - VRSHRQ_N))
> - ]
> - "TARGET_HAVE_MVE"
> - "vrshr.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
> - [(set_attr "type" "mve_move")
> -])
> -
> ;;
> ;; [vabdq_f]
> ;;
> @@ -4661,35 +4647,19 @@ (define_insn
> "@mve_<mve_insn>q_m_n_<supf><mode>"
>
> ;;
> ;; [vrshrq_m_n_s, vrshrq_m_n_u])
> -;;
> -(define_insn "mve_vrshrq_m_n_<supf><mode>"
> - [
> - (set (match_operand:MVE_2 0 "s_register_operand" "=w")
> - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
> - (match_operand:MVE_2 2 "s_register_operand" "w")
> - (match_operand:SI 3 "<MVE_pred2>"
> "<MVE_constraint2>")
> - (match_operand:<MVE_VPRED> 4
> "vpr_register_operand" "Up")]
> - VRSHRQ_M_N))
> - ]
> - "TARGET_HAVE_MVE"
> - "vpst\;vrshrt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
> - [(set_attr "type" "mve_move")
> - (set_attr "length""8")])
> -
> -;;
> ;; [vshrq_m_n_s, vshrq_m_n_u])
> ;;
> -(define_insn "mve_vshrq_m_n_<supf><mode>"
> +(define_insn "@mve_<mve_insn>q_m_n_<supf><mode>"
> [
> (set (match_operand:MVE_2 0 "s_register_operand" "=w")
> (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
> (match_operand:MVE_2 2 "s_register_operand" "w")
> (match_operand:SI 3 "<MVE_pred2>"
> "<MVE_constraint2>")
> (match_operand:<MVE_VPRED> 4
> "vpr_register_operand" "Up")]
> - VSHRQ_M_N))
> + MVE_VSHRQ_M_N))
> ]
> "TARGET_HAVE_MVE"
> - "vpst\;vshrt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
> + "vpst\;<mve_insn>t.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
> [(set_attr "type" "mve_move")
> (set_attr "length""8")])
>
> --
> 2.34.1
next prev parent reply other threads:[~2023-05-05 11:06 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 8:39 [PATCH 01/23] arm: [MVE intrinsics] add binary_round_lshift shape Christophe Lyon
2023-05-05 8:39 ` [PATCH 02/23] arm: [MVE intrinsics] factorize vqrshlq vrshlq Christophe Lyon
2023-05-05 9:58 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 03/23] arm: [MVE intrinsics] rework vrshlq vqrshlq Christophe Lyon
2023-05-05 9:59 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 04/23] arm: [MVE intrinsics] factorize vqshlq vshlq Christophe Lyon
2023-05-05 10:00 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 05/23] arm: [MVE intrinsics] rework vqrdmulhq Christophe Lyon
2023-05-05 10:01 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 06/23] arm: [MVE intrinsics] factorize vabdq Christophe Lyon
2023-05-05 10:48 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 07/23] arm: [MVE intrinsics] rework vabdq Christophe Lyon
2023-05-05 10:49 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 08/23] arm: [MVE intrinsics] add binary_lshift shape Christophe Lyon
2023-05-05 10:51 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 09/23] arm: [MVE intrinsics] add support for MODE_r Christophe Lyon
2023-05-05 10:55 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 10/23] arm: [MVE intrinsics] add binary_lshift_r shape Christophe Lyon
2023-05-05 10:56 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 11/23] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vshl Christophe Lyon
2023-05-05 10:56 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 12/23] arm: [MVE intrinsics] rework vqshlq vshlq Christophe Lyon
2023-05-05 10:58 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 13/23] arm: [MVE intrinsics] factorize vmaxq vminq Christophe Lyon
2023-05-05 10:58 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 14/23] arm: [MVE intrinsics] rework " Christophe Lyon
2023-05-05 10:59 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 15/23] arm: [MVE intrinsics] add binary_rshift_narrow shape Christophe Lyon
2023-05-05 11:00 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 16/23] arm: [MVE intrinsics] factorize vshrntq vshrnbq vrshrnbq vrshrntq vqshrnbq vqshrntq vqrshrnbq vqrshrntq Christophe Lyon
2023-05-05 11:00 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 17/23] arm: [MVE intrinsics] rework vshrnbq vshrntq " Christophe Lyon
2023-05-05 11:02 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 18/23] arm: [MVE intrinsics] add binary_rshift_narrow_unsigned shape Christophe Lyon
2023-05-05 11:03 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 19/23] arm: [MVE intrinsics] factorize vqrshrunb vqrshrunt vqshrunb vqshrunt Christophe Lyon
2023-05-05 11:04 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 20/23] arm: [MVE intrinsics] rework vqrshrunbq vqrshruntq vqshrunbq vqshruntq Christophe Lyon
2023-05-05 11:05 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 21/23] arm: [MVE intrinsics] add binary_rshift shape Christophe Lyon
2023-05-05 11:05 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 22/23] arm: [MVE intrinsics] factorize vsrhrq vrshrq Christophe Lyon
2023-05-05 11:06 ` Kyrylo Tkachov [this message]
2023-05-05 8:39 ` [PATCH 23/23] arm: [MVE intrinsics] rework vshrq vrshrq Christophe Lyon
2023-05-05 11:07 ` Kyrylo Tkachov
2023-05-05 9:55 ` [PATCH 01/23] arm: [MVE intrinsics] add binary_round_lshift shape Kyrylo Tkachov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=PAXPR08MB692674FB7FA970BCCE94E4F793729@PAXPR08MB6926.eurprd08.prod.outlook.com \
--to=kyrylo.tkachov@arm.com \
--cc=Christophe.Lyon@arm.com \
--cc=Richard.Earnshaw@arm.com \
--cc=Richard.Sandiford@arm.com \
--cc=gcc-patches@gcc.gnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).