From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2066.outbound.protection.outlook.com [40.107.21.66]) by sourceware.org (Postfix) with ESMTPS id BB3193852C4E for ; Fri, 18 Nov 2022 16:36:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org BB3193852C4E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RFhOvJ2C0XTlgZ28tivk476te66TYSvg3D6hZtFnl7E=; b=ewxHcRMb2nLjyAPN1OAlzn9mm9dCFMnIVFYD56xttZOsEZgtXPfJ473hbVxJKV/mr4ds9mRZxLbKzz2JR4DuRLT2UNpyLWLEZPu7ut9REfbX97l3Puh5OEm5BwXNcUKlkWwAZOLD2d9680VZHPw4KCNytwOGK6Rnb//qpRHg1EA= Received: from AS9PR05CA0054.eurprd05.prod.outlook.com (2603:10a6:20b:489::13) by AM9PR08MB5987.eurprd08.prod.outlook.com (2603:10a6:20b:2da::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5857.8; Fri, 18 Nov 2022 16:36:43 +0000 Received: from AM7EUR03FT065.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:489:cafe::63) by AS9PR05CA0054.outlook.office365.com (2603:10a6:20b:489::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5813.14 via Frontend Transport; Fri, 18 Nov 2022 16:36:43 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM7EUR03FT065.mail.protection.outlook.com (100.127.140.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5834.8 via Frontend Transport; Fri, 18 Nov 2022 16:36:43 +0000 Received: ("Tessian outbound 58faf9791229:v130"); Fri, 18 Nov 2022 16:36:43 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: 0800aeb2ec422d90 X-CR-MTA-TID: 64aa7808 Received: from b8d29346fe82.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 1456511A-33D0-470E-B294-753EB2F0D661.1; Fri, 18 Nov 2022 16:36:36 +0000 Received: from EUR02-AM0-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id b8d29346fe82.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Fri, 18 Nov 2022 16:36:36 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=CiwHU1qDTPuzxzqsbBsmrMFbhHXbnJ4Yvng1PjerbimynH2ed54mEyfQSk7UYXQlN5R7ai9DggyYaya2KlW3Hl7Fb2ARI4T1fIs3jqWLWairmD/hf6od/LyEymIv5RveVxDg0c3I5dpVvI2zgHwxUQGYtiigeWfsWxIpJbLtJRreEVgj/RWbtyJoWX0mr9Rcdv7MW2o8JdbC3vI+hm3D/j6Kjq5B7NicN6qcTeOEAAIe0eyd5BG141pw1L6Gep/bY5V5fUOspIqAEAqLTT5nQ5PKMPGaDI/sqnwlqv41ResCSLbV1/NgjZofrefmvIfsyRR6EmHSZM7ZUyIbxhzzGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=RFhOvJ2C0XTlgZ28tivk476te66TYSvg3D6hZtFnl7E=; b=LdT/y2qgUTnw0k4vVFJrcB1ZZqYG3oLVEtLLdemtBN/Zj9xrR6UNqS1nTcXieNQ3iSZBy/WLCUB0pui+LIfL4ug8EYimsimORqab6jFVtCcWHtJNwWf4Fu3vhXAKOUlD4WTdHYW0bEILUIe0qWCaVitGEukI8fER3EfNjED9hbn5QoH0KSUOBenW5dMDkqo2ZSoSs3d5SQO7QYgMZTDbN8tuJGsnvtbVFOEopWErgfQJJNo+tsJI6vKpZdr6wnICNAW5X3EVK7rr5IsIfo3IRukO/GR7MpQuxezs8k3xJSUQ1GlAyv4uYMnzdeRG/yo2ffrH1iM/a57zxIS0qT0gCg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RFhOvJ2C0XTlgZ28tivk476te66TYSvg3D6hZtFnl7E=; b=ewxHcRMb2nLjyAPN1OAlzn9mm9dCFMnIVFYD56xttZOsEZgtXPfJ473hbVxJKV/mr4ds9mRZxLbKzz2JR4DuRLT2UNpyLWLEZPu7ut9REfbX97l3Puh5OEm5BwXNcUKlkWwAZOLD2d9680VZHPw4KCNytwOGK6Rnb//qpRHg1EA= Received: from PAXPR08MB6926.eurprd08.prod.outlook.com (2603:10a6:102:138::24) by AM8PR08MB5732.eurprd08.prod.outlook.com (2603:10a6:20b:1d4::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5857.8; Fri, 18 Nov 2022 16:36:34 +0000 Received: from PAXPR08MB6926.eurprd08.prod.outlook.com ([fe80::8668:3414:edde:d292]) by PAXPR08MB6926.eurprd08.prod.outlook.com ([fe80::8668:3414:edde:d292%7]) with mapi id 15.20.5857.008; Fri, 18 Nov 2022 16:36:34 +0000 From: Kyrylo Tkachov To: Andrea Corallo , "gcc-patches@gcc.gnu.org" CC: Richard Earnshaw , Andrea Corallo Subject: RE: [PATCH 05/35] arm: improve vidupq* tests Thread-Topic: [PATCH 05/35] arm: improve vidupq* tests Thread-Index: AQHY+qMEKo/YYuJ+2kyG/+SF8V8HKq5E4oZg Date: Fri, 18 Nov 2022 16:36:34 +0000 Message-ID: References: <20221117163809.1009526-1-andrea.corallo@arm.com> <20221117163809.1009526-6-andrea.corallo@arm.com> In-Reply-To: <20221117163809.1009526-6-andrea.corallo@arm.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; x-ms-traffictypediagnostic: PAXPR08MB6926:EE_|AM8PR08MB5732:EE_|AM7EUR03FT065:EE_|AM9PR08MB5987:EE_ X-MS-Office365-Filtering-Correlation-Id: 4b7264b1-85e1-4e6d-83e2-08dac98313b6 x-checkrecipientrouted: true nodisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: eRxEPtg+hvv8fmohBEcujPEy+PpXP3GLrr1LIeSRKqGNpjNGfiMXDIB4JILr0j6b6DJ2MYQWuZ2NsXfowizHrY1Lo6mbtaaYFOUgumu52yOrJvLDboadTcoouTpp6umB9DCOJ3ba7Q+jsWSQqQPaYcbeVv67VzCLsBrEWysSJLXIkS+uNBb+IRvquVdr99ir2P7JSY8yGsqc78ONSgXx7myDJeZclb8YqsGDsPJdpJYGkqby8Uqltow+C4S4ZfgFosW+1Zqc5rEYL0jOSMw1s0wJwxPuRsHNbPLDngkkskT6PGLyEtGy6hPMYtIAQ+XMG5u06HfFn4/IXhtQvVhhohmy5Mip+SsGpv2ojh4aXDIDjyZ0+WK/DRZMiSK86JOapxqglJB4+jUAGFyLCHXrpQ8Ob16hxun0KILl7zN+yBF0aOW4m85uhvrNOTdoYRW0ioRef6FJGaoMLV71MZ+gUa5+1wjE8MArfXVlr715jjLunGMOMsL7b8TU2uizcLl4CGyh8McvqGGmnf5M7G0h0QheB16UOD7UKIr/QBin7F/18myeWwwl03TYFZNgONip9daDSDsdnrD+XX3P76K4HpWrnKWnbkN0nWSE6k+dLebqKK9k1sHfaWgj/WNNFnOpxRRcPkMoMMiPevXAiq5Mx3NsCiLO4AOZQC1U0qNTDx4QUuxPXGYJf8H2mcNd3+4LJQ+AfP3W/fZQ3E8ORxvFykAF69aUH8kTtnc/v6lCezVSZqdGjTqyH1RIxI3WizJ9NdJRLJemD1jx3NhngFifEw== X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PAXPR08MB6926.eurprd08.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(4636009)(346002)(136003)(396003)(366004)(376002)(39860400002)(451199015)(316002)(54906003)(84970400001)(2906002)(71200400001)(33656002)(26005)(38070700005)(6506007)(110136005)(55016003)(8936002)(7696005)(9686003)(53546011)(186003)(4326008)(66946007)(66556008)(66446008)(66476007)(64756008)(8676002)(76116006)(30864003)(52536014)(478600001)(86362001)(83380400001)(5660300002)(122000001)(41300700001)(38100700002)(579004)(559001);DIR:OUT;SFP:1101; Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR08MB5732 Original-Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT065.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 9d9a332e-8e6f-496a-cdd7-08dac9830e56 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: /QGLwF0f+kSAuflWVnfdoSaaN7zpwXUAuLRLFo5NJ5QU+3YoZktCxPuyRRmZ3K3pTvRIqCo2Jtk0Rx+rCGge9tavUKb8oRGpYkpGVcZLydXPuI7KLoJ22436T01DycgmAKVldx+gzVk/lWQVNlRc/RL7F+8Q30mDjDlcSQi8xYHSTbzZP0oTTvRpW8591LxjvosrlmDIYUB9MdUdE7B65vzEDwjdIxQRreH5X4yLDGbV54VioICXYEbRWPlAfMgvCIbqdfOHq+6CFCM1cxy4q8vG2BBr4Md5y61e66Oo/jNJs80qcGmau+UZrqaNY2wiyB8KfNonDX5Ct2B7j3xBGFbZu7wLGD94an3IdM4rwFw13Eoy1a2uhu90PfuB3iIxNK7yUdT8YW7CPDtZH/wEMWJrRCLqQPE+yehekjpjQxp9hf+5EfirC6TuNUOcmc0DfOCI4JL7lKKQu4l4y+pMB6D3PpEpp1f1o5YFijdletWwynfxxVaQJdpEISguwqMFlTcW5N0Xp9UYv4fIXyzaspSiSLpuz3XJ3C4mf53KVKi4r5vxSlhKa5D+QL4CPOWsSRtU/LROJW2z/3DGomyeJ1riKwBpn9j0IYV98PRjZ98KO12gBn9wiTRiiN+yHBWe9n6IIPJ3imLk4jrNgZJNyj11a0Ljn2Z1LNMmafqwNUa+0/QfdEai0eey3beKuq3Ph3Ji59sIxd8KbDjj4b8ZCNSVxoz9s12f1s7+HlC+w1zpI04h3ITVqM4HLbL33Zj/C/c/0QyGluK0liVigDRlmQ== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230022)(4636009)(376002)(396003)(136003)(39860400002)(346002)(451199015)(46966006)(40470700004)(36840700001)(83380400001)(84970400001)(86362001)(55016003)(40460700003)(478600001)(26005)(7696005)(110136005)(6506007)(9686003)(33656002)(356005)(81166007)(40480700001)(82310400005)(36860700001)(186003)(336012)(47076005)(70586007)(8936002)(70206006)(52536014)(41300700001)(30864003)(53546011)(8676002)(82740400003)(4326008)(5660300002)(2906002)(316002)(54906003);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Nov 2022 16:36:43.4192 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4b7264b1-85e1-4e6d-83e2-08dac98313b6 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT065.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR08MB5987 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Andrea Corallo > Sent: Thursday, November 17, 2022 4:38 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov ; Richard Earnshaw > ; Andrea Corallo > Subject: [PATCH 05/35] arm: improve vidupq* tests >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Improve tests. > * gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise. Ok. Thanks, Kyrill > --- > .../arm/mve/intrinsics/vidupq_m_n_u16.c | 46 +++++++++++++--- > .../arm/mve/intrinsics/vidupq_m_n_u32.c | 42 +++++++++++++-- > .../arm/mve/intrinsics/vidupq_m_n_u8.c | 42 +++++++++++++-- > .../arm/mve/intrinsics/vidupq_m_wb_u16.c | 46 +++++++++++++--- > .../arm/mve/intrinsics/vidupq_m_wb_u32.c | 42 +++++++++++++-- > .../arm/mve/intrinsics/vidupq_m_wb_u8.c | 42 +++++++++++++-- > .../arm/mve/intrinsics/vidupq_n_u16.c | 32 ++++++++++-- > .../arm/mve/intrinsics/vidupq_n_u32.c | 28 +++++++++- > .../arm/mve/intrinsics/vidupq_n_u8.c | 28 +++++++++- > .../arm/mve/intrinsics/vidupq_wb_u16.c | 32 ++++++++++-- > .../arm/mve/intrinsics/vidupq_wb_u32.c | 28 +++++++++- > .../arm/mve/intrinsics/vidupq_wb_u8.c | 28 +++++++++- > .../arm/mve/intrinsics/vidupq_x_n_u16.c | 46 +++++++++++++--- > .../arm/mve/intrinsics/vidupq_x_n_u32.c | 42 +++++++++++++-- > .../arm/mve/intrinsics/vidupq_x_n_u8.c | 42 +++++++++++++-- > .../arm/mve/intrinsics/vidupq_x_wb_u16.c | 52 +++++++++++++++---- > .../arm/mve/intrinsics/vidupq_x_wb_u32.c | 52 +++++++++++++++---- > .../arm/mve/intrinsics/vidupq_x_wb_u8.c | 52 +++++++++++++++---- > 18 files changed, 634 insertions(+), 88 deletions(-) >=20 > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c > index 822d41197e6..b4ee7af36e3 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p) > { > - return vidupq_m_n_u16 (inactive, a, 4, p); > + return vidupq_m_n_u16 (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p) > { > - return vidupq_m (inactive, a, 4, p); > + return vidupq_m (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (uint16x8_t inactive, mve_pred16_t p) > +{ > + return vidupq_m (inactive, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c > index c01826e15dc..b13a7a80dcb 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p) > { > return vidupq_m_n_u32 (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p) > { > return vidupq_m (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (uint32x4_t inactive, mve_pred16_t p) > +{ > + return vidupq_m (inactive, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c > index e269665813c..b731002724a 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p) > { > return vidupq_m_n_u8 (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p) > { > return vidupq_m (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u8" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (uint8x16_t inactive, mve_pred16_t p) > +{ > + return vidupq_m (inactive, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c > index 8d21bc7db80..0e2ad6a2b55 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p) > { > - return vidupq_m_wb_u16 (inactive, a, 4, p); > + return vidupq_m_wb_u16 (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p) > { > - return vidupq_m (inactive, a, 4, p); > + return vidupq_m (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (uint16x8_t inactive, mve_pred16_t p) > +{ > + return vidupq_m (inactive, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c > index e7bc06cd826..786a05eee35 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p) > { > return vidupq_m_wb_u32 (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p) > { > return vidupq_m (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (uint32x4_t inactive, mve_pred16_t p) > +{ > + return vidupq_m (inactive, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c > index a8a2f9a1c49..3fcc3ba0d67 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p) > { > return vidupq_m_wb_u8 (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p) > { > return vidupq_m (inactive, a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u8" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (uint8x16_t inactive, mve_pred16_t p) > +{ > + return vidupq_m (inactive, 1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c > index c59ca1ebf74..a6ffdc05ce5 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint32_t a) > { > - return vidupq_n_u16 (a, 4); > + return vidupq_n_u16 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint32_t a) > { > - return vidupq_u16 (a, 4); > + return vidupq_u16 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u16" } } */ > +/* > +**foo2: > +** ... > +** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 () > +{ > + return vidupq_u16 (1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c > index 7e835e0868c..8cd43e38255 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32_t a) > { > return vidupq_n_u32 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32_t a) > { > return vidupq_u32 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u32" } } */ > +/* > +**foo2: > +** ... > +** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 () > +{ > + return vidupq_u32 (1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c > index 06d1a1a1480..4005eabb45d 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint32_t a) > { > return vidupq_n_u8 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint32_t a) > { > return vidupq_u8 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u8" } } */ > +/* > +**foo2: > +** ... > +** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 () > +{ > + return vidupq_u8 (1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c > index 1cb0ded198f..3ad89c0536c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint32_t *a) > { > - return vidupq_wb_u16 (a, 4); > + return vidupq_wb_u16 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint32_t *a) > { > - return vidupq_u16 (a, 4); > + return vidupq_u16 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u16" } } */ > +/* > +**foo2: > +** ... > +** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 () > +{ > + return vidupq_u16 (1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c > index e5d9c5327fb..45eb1b09a5b 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32_t *a) > { > return vidupq_wb_u32 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32_t *a) > { > return vidupq_u32 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u32" } } */ > +/* > +**foo2: > +** ... > +** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 () > +{ > + return vidupq_u32 (1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c > index 57e1bb46776..beb0aae67a9 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint32_t *a) > { > return vidupq_wb_u8 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint32_t *a) > { > return vidupq_u8 (a, 1); > } >=20 > -/* { dg-final { scan-assembler "vidup.u8" } } */ > +/* > +**foo2: > +** ... > +** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 () > +{ > + return vidupq_u8 (1, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c > index bdf8ec2b047..74cd4310213 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint32_t a, mve_pred16_t p) > { > - return vidupq_x_n_u16 (a, 4, p); > + return vidupq_x_n_u16 (a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint32_t a, mve_pred16_t p) > { > - return vidupq_x_u16 (a, 4, p); > + return vidupq_x_u16 (a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (mve_pred16_t p) > +{ > + return vidupq_x_u16 (1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c > index 8be549cb446..3111b1a54e6 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32_t a, mve_pred16_t p) > { > return vidupq_x_n_u32 (a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32_t a, mve_pred16_t p) > { > return vidupq_x_u32 (a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (mve_pred16_t p) > +{ > + return vidupq_x_u32 (1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c > index 1e1975017de..5bedb4f9e79 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint32_t a, mve_pred16_t p) > { > return vidupq_x_n_u8 (a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint32_t a, mve_pred16_t p) > { > return vidupq_x_u8 (a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u8" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (mve_pred16_t p) > +{ > + return vidupq_x_u8 (1, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c > index 31197a76cfa..caf334fa32f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c > @@ -1,25 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > -uint32_t *a; > - > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > -foo (mve_pred16_t p) > +foo (uint32_t *a, mve_pred16_t p) > { > - return vidupq_x_wb_u16 (a, 8, p); > + return vidupq_x_wb_u16 (a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo1 (uint32_t *a, mve_pred16_t p) > +{ > + return vidupq_x_u16 (a, 1, p); > +} > + > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > -foo1 (mve_pred16_t p) > +foo2 (mve_pred16_t p) > { > - return vidupq_x_u16 (a, 8, p); > + return vidupq_x_u16 (1, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c > index cef56f133e8..11895e303cf 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c > @@ -1,25 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > -uint32_t *a; > - > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > -foo (mve_pred16_t p) > +foo (uint32_t *a, mve_pred16_t p) > { > - return vidupq_x_wb_u32 (a, 2, p); > + return vidupq_x_wb_u32 (a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo1 (uint32_t *a, mve_pred16_t p) > +{ > + return vidupq_x_u32 (a, 1, p); > +} > + > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > -foo1 (mve_pred16_t p) > +foo2 (mve_pred16_t p) > { > - return vidupq_x_u32 (a, 2, p); > + return vidupq_x_u32 (1, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c > index 0403ba1174c..b951d4cfe94 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c > @@ -1,25 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > -uint32_t * a; > - > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > -foo (mve_pred16_t p) > +foo (uint32_t *a, mve_pred16_t p) > { > - return vidupq_x_wb_u8 (a, 2, p); > + return vidupq_x_wb_u8 (a, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo1 (uint32_t *a, mve_pred16_t p) > +{ > + return vidupq_x_u8 (a, 1, p); > +} > + > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > -foo1 (mve_pred16_t p) > +foo2 (mve_pred16_t p) > { > - return vidupq_x_u8 (a, 2, p); > + return vidupq_x_u8 (1, 1, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vidupt.u8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > -- > 2.25.1