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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jan 2023 18:08:46.9588 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4eef27f8-00a8-4d07-7d83-08dafb115ffc X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT062.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB9120 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Andrea Corallo > Sent: Friday, January 20, 2023 4:40 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov ; Richard Earnshaw > ; Andrea Corallo > Subject: [PATCH 20/23] arm: improve tests for vqrdmulhq* >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Improve > test. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise. Ok. Thanks, Kyrill > --- > .../arm/mve/intrinsics/vqrdmulhq_m_n_s16.c | 34 ++++++++++++++++--- > .../arm/mve/intrinsics/vqrdmulhq_m_n_s32.c | 34 ++++++++++++++++--- > .../arm/mve/intrinsics/vqrdmulhq_m_n_s8.c | 34 ++++++++++++++++--- > .../arm/mve/intrinsics/vqrdmulhq_m_s16.c | 34 ++++++++++++++++--- > .../arm/mve/intrinsics/vqrdmulhq_m_s32.c | 34 ++++++++++++++++--- > .../arm/mve/intrinsics/vqrdmulhq_m_s8.c | 34 ++++++++++++++++--- > .../arm/mve/intrinsics/vqrdmulhq_n_s16.c | 24 +++++++++++-- > .../arm/mve/intrinsics/vqrdmulhq_n_s32.c | 24 +++++++++++-- > .../arm/mve/intrinsics/vqrdmulhq_n_s8.c | 24 +++++++++++-- > .../arm/mve/intrinsics/vqrdmulhq_s16.c | 24 +++++++++++-- > .../arm/mve/intrinsics/vqrdmulhq_s32.c | 24 +++++++++++-- > .../arm/mve/intrinsics/vqrdmulhq_s8.c | 24 +++++++++++-- > 12 files changed, 312 insertions(+), 36 deletions(-) >=20 > diff --git > a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c > index c4b6b7e22f8..fc3a33073aa 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c > @@ -1,23 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) > { > return vqrdmulhq_m_n_s16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) > { > return vqrdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s16" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git > a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c > index 6de3eb1cb9a..897ad5bd28c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c > @@ -1,23 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) > { > return vqrdmulhq_m_n_s32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) > { > return vqrdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s32" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8= .c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c > index df3dfa87fbf..05ab0609af4 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c > @@ -1,23 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) > { > return vqrdmulhq_m_n_s8 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) > { > return vqrdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s8" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c > index 24831e8a5f8..1d9dc07787c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c > @@ -1,23 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vqrdmulhq_m_s16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vqrdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s16" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c > index 70257c3c0a0..76d7507e35a 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c > @@ -1,23 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vqrdmulhq_m_s32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vqrdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s32" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c > index 7cd39d2a0d4..7fd2119ea63 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c > @@ -1,23 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) > { > return vqrdmulhq_m_s8 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqrdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) > { > return vqrdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqrdmulht.s8" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c > index 42fe9cbaa2b..8a90a399858 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vqrdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t a, int16_t b) > { > return vqrdmulhq_n_s16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqrdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t a, int16_t b) > { > return vqrdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s16" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c > index 5f014fae9fb..973464b3297 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vqrdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t a, int32_t b) > { > return vqrdmulhq_n_s32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqrdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t a, int32_t b) > { > return vqrdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s32" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c > index 887e294661b..65aab964f4e 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vqrdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t a, int8_t b) > { > return vqrdmulhq_n_s8 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqrdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t a, int8_t b) > { > return vqrdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s8" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c > index 409fc29c0d0..f3153c86b4c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vqrdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t a, int16x8_t b) > { > return vqrdmulhq_s16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqrdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t a, int16x8_t b) > { > return vqrdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s16" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c > index 18e11b1248c..48b10dbd025 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vqrdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t a, int32x4_t b) > { > return vqrdmulhq_s32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqrdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t a, int32x4_t b) > { > return vqrdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s32" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c > index 3f1441d5d6b..9f0346fc841 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vqrdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t a, int8x16_t b) > { > return vqrdmulhq_s8 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqrdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t a, int8x16_t b) > { > return vqrdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqrdmulh.s8" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > -- > 2.25.1