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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Nov 2022 16:58:35.0930 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 99c862a6-7459-4558-6f72-08daccaacb31 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT033.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR08MB6707 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Andrea Corallo > Sent: Thursday, November 17, 2022 4:38 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov ; Richard Earnshaw > ; Andrea Corallo > Subject: [PATCH 29/35] arm: improve tests for vqdmul* >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Improve > tests. > * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise. Ok. Thanks, Kyrill > --- > .../arm/mve/intrinsics/vqdmulhq_m_n_s16.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmulhq_m_n_s32.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmulhq_m_n_s8.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmulhq_m_s16.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmulhq_m_s32.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmulhq_m_s8.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmulhq_n_s16.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmulhq_n_s32.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmulhq_n_s8.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmulhq_s16.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmulhq_s32.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmulhq_s8.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmullbq_m_n_s16.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmullbq_m_n_s32.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmullbq_m_s16.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmullbq_m_s32.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmullbq_n_s16.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmullbq_n_s32.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmullbq_s16.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmullbq_s32.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmulltq_m_n_s16.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmulltq_m_n_s32.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmulltq_m_s16.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmulltq_m_s32.c | 26 ++++++++++++++++--- > .../arm/mve/intrinsics/vqdmulltq_n_s16.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmulltq_n_s32.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmulltq_s16.c | 16 ++++++++++-- > .../arm/mve/intrinsics/vqdmulltq_s32.c | 16 ++++++++++-- > 28 files changed, 504 insertions(+), 84 deletions(-) >=20 > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16= .c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c > index 57ab85eaf52..a5c1a106205 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) > { > return vqdmulhq_m_n_s16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) > { > return vqdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32= .c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c > index 256353a0a21..c78d4db1591 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) > { > return vqdmulhq_m_n_s32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) > { > return vqdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c > index c24be9ed5ad..b5ab6eb292c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) > { > return vqdmulhq_m_n_s8 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) > { > return vqdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c > index 49efeefcf63..2f5fb0e53a4 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vqdmulhq_m_s16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vqdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c > index a5614830622..80a938a8a5b 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vqdmulhq_m_s32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vqdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c > index 2e016f57e35..bfb755af4ee 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) > { > return vqdmulhq_m_s8 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) > { > return vqdmulhq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulht.s8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c > index 19534b60b27..e34689d203d 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t a, int16_t b) > { > return vqdmulhq_n_s16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t a, int16_t b) > { > return vqdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c > index eff9f6ecc4b..f967b8a286a 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t a, int32_t b) > { > return vqdmulhq_n_s32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t a, int32_t b) > { > return vqdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c > index 188cf7c616f..5e1928fd51b 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t a, int8_t b) > { > return vqdmulhq_n_s8 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t a, int8_t b) > { > return vqdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c > index 513a30f67e6..7c0a434e48f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t a, int16x8_t b) > { > return vqdmulhq_s16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t a, int16x8_t b) > { > return vqdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c > index 9cf147dc7c5..19f4b03f6f0 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t a, int32x4_t b) > { > return vqdmulhq_s32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t a, int32x4_t b) > { > return vqdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c > index 87211ad054a..1784c967f3c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t a, int8x16_t b) > { > return vqdmulhq_s8 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t a, int8x16_t b) > { > return vqdmulhq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmulh.s8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git > a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c > index f0a4ad5b9f4..4f96e192732 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmullbt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) > { > return vqdmullbq_m_n_s16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmullbt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) > { > return vqdmullbq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git > a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c > index 1c7b2e4a1fc..d0bca6e3015 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmullbt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int64x2_t > foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) > { > return vqdmullbq_m_n_s32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmullbt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int64x2_t > foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) > { > return vqdmullbq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c > index 6a056cf86a1..8448cdc88cf 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vqdmullbq_m_s16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vqdmullbq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c > index 019c536e7f2..48cddcd791e 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int64x2_t > foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vqdmullbq_m_s32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int64x2_t > foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vqdmullbq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c > index ec501c34539..cd7c394139d 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmullb.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int16x8_t a, int16_t b) > { > return vqdmullbq_n_s16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullb.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmullb.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int16x8_t a, int16_t b) > { > return vqdmullbq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullb.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c > index 78fe3d6b289..b4d82f55987 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmullb.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int64x2_t > foo (int32x4_t a, int32_t b) > { > return vqdmullbq_n_s32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullb.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmullb.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int64x2_t > foo1 (int32x4_t a, int32_t b) > { > return vqdmullbq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullb.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c > index 9a423d3cc66..6f0fdabf67f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int16x8_t a, int16x8_t b) > { > return vqdmullbq_s16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullb.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int16x8_t a, int16x8_t b) > { > return vqdmullbq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullb.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c > index f0278cd8a86..2bf952bfd77 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int64x2_t > foo (int32x4_t a, int32x4_t b) > { > return vqdmullbq_s32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullb.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int64x2_t > foo1 (int32x4_t a, int32x4_t b) > { > return vqdmullbq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullb.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s1= 6.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c > index 85f03149da4..6c756ebf3e7 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulltt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) > { > return vqdmulltq_m_n_s16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulltt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) > { > return vqdmulltq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s3= 2.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c > index 6bb5004e201..e46f6b2c384 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulltt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int64x2_t > foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) > { > return vqdmulltq_m_n_s32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulltt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int64x2_t > foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) > { > return vqdmulltq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c > index a85393b5bc1..8526b3ad628 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vqdmulltq_m_s16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vqdmulltq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c > index 82f25b2ebbe..809e0740e46 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int64x2_t > foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vqdmulltq_m_s32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vqdmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int64x2_t > foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vqdmulltq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c > index f9ad32a8411..44f0036bc51 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmullt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int16x8_t a, int16_t b) > { > return vqdmulltq_n_s16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullt.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmullt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int16x8_t a, int16_t b) > { > return vqdmulltq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullt.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.= c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c > index 311b023431e..b025886ff15 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmullt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int64x2_t > foo (int32x4_t a, int32_t b) > { > return vqdmulltq_n_s32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullt.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmullt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int64x2_t > foo1 (int32x4_t a, int32_t b) > { > return vqdmulltq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullt.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c > index 851f27a63b6..95084876349 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int16x8_t a, int16x8_t b) > { > return vqdmulltq_s16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullt.s16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int16x8_t a, int16x8_t b) > { > return vqdmulltq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullt.s16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c > index 1e81cc3dea5..ab27aeddc29 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vqdmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int64x2_t > foo (int32x4_t a, int32x4_t b) > { > return vqdmulltq_s32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullt.s32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vqdmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int64x2_t > foo1 (int32x4_t a, int32x4_t b) > { > return vqdmulltq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vqdmullt.s32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > -- > 2.25.1