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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jan 2023 17:46:22.7417 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 81e09158-e327-46e7-3bb6-08dafb0e3ec5 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT003.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB5379 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Andrea Corallo > Sent: Friday, January 20, 2023 4:39 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov ; Richard Earnshaw > ; Andrea Corallo > Subject: [PATCH 02/23] arm: improve tests and fix vclzq* >=20 > gcc/ChangeLog: >=20 > * config/arm/mve.md (@mve_vclzq_s): Fix spacing. >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arm/mve/intrinsics/vclzq_m_s16.c: Improve test. As in patch 1/23, ok with a more descriptive entry. Thanks, Kyrill > * gcc.target/arm/mve/intrinsics/vclzq_m_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_m_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_m_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_m_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_m_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_u8.c: Likewise. > * gcc.target/arm/simd/mve-vclz.c: Update test. > --- > gcc/config/arm/mve.md | 2 +- > .../arm/mve/intrinsics/vclzq_m_s16.c | 33 +++++++++++++++++-- > .../arm/mve/intrinsics/vclzq_m_s32.c | 33 +++++++++++++++++-- > .../arm/mve/intrinsics/vclzq_m_s8.c | 33 +++++++++++++++++-- > .../arm/mve/intrinsics/vclzq_m_u16.c | 33 +++++++++++++++++-- > .../arm/mve/intrinsics/vclzq_m_u32.c | 33 +++++++++++++++++-- > .../arm/mve/intrinsics/vclzq_m_u8.c | 33 +++++++++++++++++-- > .../gcc.target/arm/mve/intrinsics/vclzq_s16.c | 28 +++++++++++++--- > .../gcc.target/arm/mve/intrinsics/vclzq_s32.c | 28 +++++++++++++--- > .../gcc.target/arm/mve/intrinsics/vclzq_s8.c | 24 ++++++++++++-- > .../gcc.target/arm/mve/intrinsics/vclzq_u16.c | 28 +++++++++++++--- > .../gcc.target/arm/mve/intrinsics/vclzq_u32.c | 28 +++++++++++++--- > .../gcc.target/arm/mve/intrinsics/vclzq_u8.c | 28 +++++++++++++--- > .../arm/mve/intrinsics/vclzq_x_s16.c | 33 +++++++++++++++++-- > .../arm/mve/intrinsics/vclzq_x_s32.c | 33 +++++++++++++++++-- > .../arm/mve/intrinsics/vclzq_x_s8.c | 33 +++++++++++++++++-- > .../arm/mve/intrinsics/vclzq_x_u16.c | 33 +++++++++++++++++-- > .../arm/mve/intrinsics/vclzq_x_u32.c | 33 +++++++++++++++++-- > .../arm/mve/intrinsics/vclzq_x_u8.c | 33 +++++++++++++++++-- > gcc/testsuite/gcc.target/arm/simd/mve-vclz.c | 6 ++-- > 20 files changed, 506 insertions(+), 62 deletions(-) >=20 > diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md > index e35ea5d9f9c..854371f7e11 100644 > --- a/gcc/config/arm/mve.md > +++ b/gcc/config/arm/mve.md > @@ -448,7 +448,7 @@ (define_insn "@mve_vclzq_s" > (clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w"))) > ] > "TARGET_HAVE_MVE" > - "vclz.i%# %q0, %q1" > + "vclz.i%#\t%q0, %q1" > [(set_attr "type" "mve_move") > ]) > (define_expand "mve_vclzq_u" > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c > index 9670f8f56f3..620314e4ff2 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) > { > return vclzq_m_s16 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) > { > return vclzq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c > index 18427354570..dfda1e67287 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) > { > return vclzq_m_s32 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) > { > return vclzq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c > index 2697d039d70..1300fe6f8c4 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) > { > return vclzq_m_s8 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) > { > return vclzq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c > index 8405b16314c..922819d388e 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) > { > return vclzq_m_u16 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) > { > return vclzq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c > index 350e6e7e661..6e75a0463cf 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) > { > return vclzq_m_u32 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) > { > return vclzq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c > index d455526f975..3c450e8eca0 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) > { > return vclzq_m_u8 (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) > { > return vclzq_m (inactive, a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c > index f71a0a4eded..17be53f395b 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c > @@ -1,21 +1,41 @@ > -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > -/* { dg-add-options arm_v8_1m_mve_fp } */ > +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ > +/* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t a) > { > return vclzq_s16 (a); > } >=20 > -/* { dg-final { scan-assembler "vclz.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t a) > { > return vclzq (a); > } >=20 > -/* { dg-final { scan-assembler "vclz.i16" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c > index 46a002bc1c5..5e440febb29 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c > @@ -1,21 +1,41 @@ > -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > -/* { dg-add-options arm_v8_1m_mve_fp } */ > +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ > +/* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t a) > { > return vclzq_s32 (a); > } >=20 > -/* { dg-final { scan-assembler "vclz.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t a) > { > return vclzq (a); > } >=20 > -/* { dg-final { scan-assembler "vclz.i32" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c > index 3cab6f32310..9eaa9a4269a 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t a) > { > return vclzq_s8 (a); > } >=20 > -/* { dg-final { scan-assembler "vclz.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t a) > { > return vclzq (a); > } >=20 > -/* { dg-final { scan-assembler "vclz.i8" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c > index cada68b6d65..37179b22a5c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t a) > { > - return vclzq_u16 (a); > + return vclzq_u16 (a); > } >=20 > -/* { dg-final { scan-assembler "vclz.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t a) > { > - return vclzq (a); > + return vclzq (a); > +} > + > +#ifdef __cplusplus > } > +#endif >=20 > -/* { dg-final { scan-assembler "vclz.i16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c > index 0291b0cea4c..65ee44d41d5 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t a) > { > - return vclzq_u32 (a); > + return vclzq_u32 (a); > } >=20 > -/* { dg-final { scan-assembler "vclz.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t a) > { > - return vclzq (a); > + return vclzq (a); > +} > + > +#ifdef __cplusplus > } > +#endif >=20 > -/* { dg-final { scan-assembler "vclz.i32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c > index 5eb7bab5e0d..bed4ab1878a 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c > @@ -1,21 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t a) > { > - return vclzq_u8 (a); > + return vclzq_u8 (a); > } >=20 > -/* { dg-final { scan-assembler "vclz.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t a) > { > - return vclzq (a); > + return vclzq (a); > +} > + > +#ifdef __cplusplus > } > +#endif >=20 > -/* { dg-final { scan-assembler "vclz.i8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c > index daddd1b4421..ea78bf20066 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t a, mve_pred16_t p) > { > return vclzq_x_s16 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t a, mve_pred16_t p) > { > return vclzq_x (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c > index d4f443f7f56..cc85d4d27e2 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t a, mve_pred16_t p) > { > return vclzq_x_s32 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t a, mve_pred16_t p) > { > return vclzq_x (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c > index b33d2c51c3f..0f809167a4f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t a, mve_pred16_t p) > { > return vclzq_x_s8 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t a, mve_pred16_t p) > { > return vclzq_x (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c > index 6d9bc79261b..a9b662d40f2 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t a, mve_pred16_t p) > { > return vclzq_x_u16 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t a, mve_pred16_t p) > { > return vclzq_x (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c > index c3b053b9f1f..5446938c3fd 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t a, mve_pred16_t p) > { > return vclzq_x_u32 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t a, mve_pred16_t p) > { > return vclzq_x (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c > index 678b2eb898d..548a74e8367 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c > @@ -1,22 +1,49 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t a, mve_pred16_t p) > { > return vclzq_x_u8 (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vclzt.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t a, mve_pred16_t p) > { > return vclzq_x (a, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > +#ifdef __cplusplus > +} > +#endif > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c > b/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c > index 7068736bc28..38e91fc5bce 100644 > --- a/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c > +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c > @@ -23,6 +23,6 @@ FUNC(u, uint, 8, clz) >=20 > /* 16 and 8-bit versions are not vectorized because they need pack/unpac= k > patterns since __builtin_clz uses 32-bit parameter and return value. = */ > -/* { dg-final { scan-assembler-times {vclz\.i32 q[0-9]+, q[0-9]+} 2 } }= */ > -/* { dg-final { scan-assembler-times {vclz\.i16 q[0-9]+, q[0-9]+} 2 { x= fail *-*-* > } } } */ > -/* { dg-final { scan-assembler-times {vclz\.i8 q[0-9]+, q[0-9]+} 2 { xf= ail *-*-* } > } } */ > +/* { dg-final { scan-assembler-times {vclz\.i32\tq[0-9]+, q[0-9]+} 2 } }= */ > +/* { dg-final { scan-assembler-times {vclz\.i16\tq[0-9]+, q[0-9]+} 2 { x= fail *-*- > * } } } */ > +/* { dg-final { scan-assembler-times {vclz\.i8\tq[0-9]+, q[0-9]+} 2 { xf= ail *-*-* > } } } */ > -- > 2.25.1