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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Nov 2022 16:51:22.4952 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 90f5d265-148f-4376-6773-08dacca9c95f X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VI1EUR03FT064.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB9633 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > -----Original Message----- > From: Andrea Corallo > Sent: Thursday, November 17, 2022 4:38 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov ; Richard Earnshaw > ; Andrea Corallo > Subject: [PATCH 18/35] arm: improve tests for vmulq* >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arm/mve/intrinsics/vmulq_f16.c: Improve test. > * gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise. Ok. Thanks, Kyrill > --- > .../gcc.target/arm/mve/intrinsics/vmulq_f16.c | 16 ++++++- > .../gcc.target/arm/mve/intrinsics/vmulq_f32.c | 16 ++++++- > .../arm/mve/intrinsics/vmulq_m_f16.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_m_f32.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_m_n_f16.c | 42 +++++++++++++++++-- > .../arm/mve/intrinsics/vmulq_m_n_f32.c | 42 +++++++++++++++++-- > .../arm/mve/intrinsics/vmulq_m_n_s16.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_m_n_s32.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_m_n_s8.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_m_n_u16.c | 42 +++++++++++++++++-- > .../arm/mve/intrinsics/vmulq_m_n_u32.c | 42 +++++++++++++++++-- > .../arm/mve/intrinsics/vmulq_m_n_u8.c | 42 +++++++++++++++++-- > .../arm/mve/intrinsics/vmulq_m_s16.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_m_s32.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_m_s8.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_m_u16.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_m_u32.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_m_u8.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_n_f16.c | 28 ++++++++++++- > .../arm/mve/intrinsics/vmulq_n_f32.c | 28 ++++++++++++- > .../arm/mve/intrinsics/vmulq_n_s16.c | 16 ++++++- > .../arm/mve/intrinsics/vmulq_n_s32.c | 16 ++++++- > .../arm/mve/intrinsics/vmulq_n_s8.c | 16 ++++++- > .../arm/mve/intrinsics/vmulq_n_u16.c | 28 ++++++++++++- > .../arm/mve/intrinsics/vmulq_n_u32.c | 28 ++++++++++++- > .../arm/mve/intrinsics/vmulq_n_u8.c | 28 ++++++++++++- > .../gcc.target/arm/mve/intrinsics/vmulq_s16.c | 16 ++++++- > .../gcc.target/arm/mve/intrinsics/vmulq_s32.c | 16 ++++++- > .../gcc.target/arm/mve/intrinsics/vmulq_s8.c | 16 ++++++- > .../gcc.target/arm/mve/intrinsics/vmulq_u16.c | 16 ++++++- > .../gcc.target/arm/mve/intrinsics/vmulq_u32.c | 16 ++++++- > .../gcc.target/arm/mve/intrinsics/vmulq_u8.c | 16 ++++++- > .../arm/mve/intrinsics/vmulq_x_f16.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_x_f32.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_x_n_f16.c | 42 +++++++++++++++++-- > .../arm/mve/intrinsics/vmulq_x_n_f32.c | 42 +++++++++++++++++-- > .../arm/mve/intrinsics/vmulq_x_n_s16.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_x_n_s32.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_x_n_s8.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_x_n_u16.c | 42 +++++++++++++++++-- > .../arm/mve/intrinsics/vmulq_x_n_u32.c | 42 +++++++++++++++++-- > .../arm/mve/intrinsics/vmulq_x_n_u8.c | 42 +++++++++++++++++-- > .../arm/mve/intrinsics/vmulq_x_s16.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_x_s32.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_x_s8.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_x_u16.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_x_u32.c | 26 ++++++++++-- > .../arm/mve/intrinsics/vmulq_x_u8.c | 26 ++++++++++-- > 48 files changed, 1148 insertions(+), 160 deletions(-) >=20 > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c > index 68fb012ad34..9251809bfa1 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float16x8_t > foo (float16x8_t a, float16x8_t b) > { > return vmulq_f16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.f16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float16x8_t > foo1 (float16x8_t a, float16x8_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.f16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c > index 512661aeec7..3dacb7ad77c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float32x4_t > foo (float32x4_t a, float32x4_t b) > { > return vmulq_f32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.f32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float32x4_t > foo1 (float32x4_t a, float32x4_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.f32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c > index d05d48f6261..8f47e962633 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float16x8_t > foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) > { > return vmulq_m_f16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float16x8_t > foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p= ) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c > index 8c2ec81da3b..41f3786e5fe 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float32x4_t > foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) > { > return vmulq_m_f32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float32x4_t > foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p= ) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c > index 1f1d408d5b9..2f4fecbf56b 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float16x8_t > foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) > { > return vmulq_m_n_f16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float16x8_t > foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float16x8_t > +foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) > +{ > + return vmulq_m (inactive, a, 1.1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c > index 4aae0849e2b..2ad4108d637 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float32x4_t > foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) > { > return vmulq_m_n_f32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float32x4_t > foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float32x4_t > +foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) > +{ > + return vmulq_m (inactive, a, 1.1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c > index 9a87f7d3643..b10bd5af687 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) > { > return vmulq_m_n_s16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c > index da7d38b9968..e8bdf7278ad 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) > { > return vmulq_m_n_s32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c > index 227b3a50a92..001e888e075 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) > { > return vmulq_m_n_s8 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c > index e09334df1de..5015f20a4be 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) > { > return vmulq_m_n_u16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) > +{ > + return vmulq_m (inactive, a, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c > index 62d6c262e5a..a6013a42721 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) > { > return vmulq_m_n_u32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) > +{ > + return vmulq_m (inactive, a, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c > index e7993ab3c31..42fc7264229 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) > { > return vmulq_m_n_u8 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) > +{ > + return vmulq_m (inactive, a, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c > index 61cdf656c19..04fdc010f5b 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vmulq_m_s16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c > index 622407b96da..96178d02e37 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vmulq_m_s32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c > index bb2943cc727..aa3b8061122 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) > { > return vmulq_m_s8 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c > index a0680174753..e56ab77f3ee 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) > { > return vmulq_m_u16 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c > index 586a32560d7..72e313cfd78 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) > { > return vmulq_m_u32 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c > index 0a8e49a5982..1ae6a93934c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) > { > return vmulq_m_u8 (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) > { > return vmulq_m (inactive, a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c > index a3f693f06f7..d77aeb219ca 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float16x8_t > foo (float16x8_t a, float16_t b) > { > return vmulq_n_f16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.f16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float16x8_t > foo1 (float16x8_t a, float16_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.f16" } } */ > +/* > +**foo2: > +** ... > +** vmul.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float16x8_t > +foo2 (float16x8_t a) > +{ > + return vmulq (a, 1.1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c > index 5d1cfa368a7..9ef6a21b2bd 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float32x4_t > foo (float32x4_t a, float32_t b) > { > return vmulq_n_f32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.f32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float32x4_t > foo1 (float32x4_t a, float32_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.f32" } } */ > +/* > +**foo2: > +** ... > +** vmul.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float32x4_t > +foo2 (float32x4_t a) > +{ > + return vmulq (a, 1.1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c > index 98e84cbf202..7ea25dce4a7 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t a, int16_t b) > { > return vmulq_n_s16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t a, int16_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c > index adbfd6fe10b..b884603ac5b 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t a, int32_t b) > { > return vmulq_n_s32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t a, int32_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c > index c845f108f88..8e6e17cd593 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t a, int8_t b) > { > return vmulq_n_s8 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t a, int8_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c > index e52acdc53b9..907bb0a4009 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t a, uint16_t b) > { > return vmulq_n_u16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t a, uint16_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i16" } } */ > +/* > +**foo2: > +** ... > +** vmul.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (uint16x8_t a) > +{ > + return vmulq (a, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c > index 9da4bc1f359..1164b29fc76 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t a, uint32_t b) > { > return vmulq_n_u32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t a, uint32_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i32" } } */ > +/* > +**foo2: > +** ... > +** vmul.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (uint32x4_t a) > +{ > + return vmulq (a, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c > index e0f152db729..ccc950e3ccf 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c > @@ -1,21 +1,45 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t a, uint8_t b) > { > return vmulq_n_u8 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t a, uint8_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i8" } } */ > +/* > +**foo2: > +** ... > +** vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (uint8x16_t a) > +{ > + return vmulq (a, 1); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c > index 89cc604fda0..a1fc1fc8f04 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t a, int16x8_t b) > { > return vmulq_s16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t a, int16x8_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c > index f87fbf1249c..4fcf0dd88d1 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t a, int32x4_t b) > { > return vmulq_s32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t a, int32x4_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c > index 4e40065ad22..d0c147ef912 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t a, int8x16_t b) > { > return vmulq_s8 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t a, int8x16_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c > index ae95bf68afe..d4a24ba95b6 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t a, uint16x8_t b) > { > return vmulq_u16 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t a, uint16x8_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c > index 4f8e9762d5f..c9194b73eaf 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t a, uint32x4_t b) > { > return vmulq_u32 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t a, uint32x4_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c > index a3776ff8314..d69402021ec 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c > @@ -1,21 +1,33 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t a, uint8x16_t b) > { > return vmulq_u8 (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t a, uint8x16_t b) > { > return vmulq (a, b); > } >=20 > -/* { dg-final { scan-assembler "vmul.i8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c > index 1f864cf481a..169871b47d8 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float16x8_t > foo (float16x8_t a, float16x8_t b, mve_pred16_t p) > { > return vmulq_x_f16 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float16x8_t > foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c > index 07cc3d0277c..f800731b3ff 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float32x4_t > foo (float32x4_t a, float32x4_t b, mve_pred16_t p) > { > return vmulq_x_f32 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > float32x4_t > foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c > index 8fa6c759d54..a4dc47725b5 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float16x8_t > foo (float16x8_t a, float16_t b, mve_pred16_t p) > { > return vmulq_x_n_f16 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float16x8_t > foo1 (float16x8_t a, float16_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float16x8_t > +foo2 (float16x8_t a, mve_pred16_t p) > +{ > + return vmulq_x (a, 1.1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c > index 654713c1348..e8428fe9b2d 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > /* { dg-add-options arm_v8_1m_mve_fp } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float32x4_t > foo (float32x4_t a, float32_t b, mve_pred16_t p) > { > return vmulq_x_n_f32 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > float32x4_t > foo1 (float32x4_t a, float32_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.f32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +float32x4_t > +foo2 (float32x4_t a, mve_pred16_t p) > +{ > + return vmulq_x (a, 1.1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c > index 4ec5ab397e1..27ef55d932a 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t a, int16_t b, mve_pred16_t p) > { > return vmulq_x_n_s16 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t a, int16_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c > index c52180067cf..929f420bd4c 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t a, int32_t b, mve_pred16_t p) > { > return vmulq_x_n_s32 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t a, int32_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c > index a2a7c734de8..31885a2d90f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t a, int8_t b, mve_pred16_t p) > { > return vmulq_x_n_s8 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t a, int8_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c > index 419a3cb6ea6..5972a525092 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t a, uint16_t b, mve_pred16_t p) > { > return vmulq_x_n_u16 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint16x8_t > +foo2 (uint16x8_t a, mve_pred16_t p) > +{ > + return vmulq_x (a, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c > index 5acfcf6bf61..3e02a542988 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t a, uint32_t b, mve_pred16_t p) > { > return vmulq_x_n_u32 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint32x4_t > +foo2 (uint32x4_t a, mve_pred16_t p) > +{ > + return vmulq_x (a, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c > index 27e95ced0b5..9b59b189a5f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c > @@ -1,23 +1,57 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t a, uint8_t b, mve_pred16_t p) > { > return vmulq_x_n_u8 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ > +/* > +**foo2: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +*/ > +uint8x16_t > +foo2 (uint8x16_t a, mve_pred16_t p) > +{ > + return vmulq_x (a, 1, p); > +} > + > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c > index 5c232bfdc34..09b7169a68b 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo (int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vmulq_x_s16 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int16x8_t > foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c > index 685fe45e4d0..a57ef2da840 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo (int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vmulq_x_s32 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int32x4_t > foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c > index 19ecc6bcafc..7fb5e007990 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo (int8x16_t a, int8x16_t b, mve_pred16_t p) > { > return vmulq_x_s8 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > int8x16_t > foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c > index 0700ca818ab..7b1c6b2acc8 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) > { > return vmulq_x_u16 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint16x8_t > foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i16" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c > index a1cb2aa221e..bc53faff33f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) > { > return vmulq_x_u32 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint32x4_t > foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i32" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c > index 3b29852c830..f43760861d4 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c > @@ -1,23 +1,41 @@ > /* { dg-require-effective-target arm_v8_1m_mve_ok } */ > /* { dg-add-options arm_v8_1m_mve } */ > /* { dg-additional-options "-O2" } */ > +/* { dg-final { check-function-bodies "**" "" } } */ >=20 > #include "arm_mve.h" >=20 > +/* > +**foo: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) > { > return vmulq_x_u8 (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ >=20 > +/* > +**foo1: > +** ... > +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) > +** ... > +** vpst(?: @.*|) > +** ... > +** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) > +** ... > +*/ > uint8x16_t > foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) > { > return vmulq_x (a, b, p); > } >=20 > -/* { dg-final { scan-assembler "vpst" } } */ > -/* { dg-final { scan-assembler "vmult.i8" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > \ No newline at end of file > -- > 2.25.1