From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Christophe Lyon <Christophe.Lyon@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
Richard Sandiford <Richard.Sandiford@arm.com>
Cc: Christophe Lyon <Christophe.Lyon@arm.com>
Subject: RE: [PATCH 11/23] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vshl
Date: Fri, 5 May 2023 10:56:54 +0000 [thread overview]
Message-ID: <PAXPR08MB6926C6AB093596F4C822C6B593729@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20230505083930.101210-11-christophe.lyon@arm.com>
> -----Original Message-----
> From: Christophe Lyon <christophe.lyon@arm.com>
> Sent: Friday, May 5, 2023 9:39 AM
> To: gcc-patches@gcc.gnu.org; Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>;
> Richard Earnshaw <Richard.Earnshaw@arm.com>; Richard Sandiford
> <Richard.Sandiford@arm.com>
> Cc: Christophe Lyon <Christophe.Lyon@arm.com>
> Subject: [PATCH 11/23] arm: [MVE intrinsics] add
> unspec_mve_function_exact_insn_vshl
>
> Introduce a function that will be used to build vshl intrinsics. They
> are special because they have to handle MODE_r.
>
Ok.
Thanks,
Kyrill
> 2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
>
> gcc/
> * config/arm/arm-mve-builtins-functions.h (class
> unspec_mve_function_exact_insn_vshl): New.
> ---
> gcc/config/arm/arm-mve-builtins-functions.h | 150 ++++++++++++++++++++
> 1 file changed, 150 insertions(+)
>
> diff --git a/gcc/config/arm/arm-mve-builtins-functions.h
> b/gcc/config/arm/arm-mve-builtins-functions.h
> index 5abf913d182..533fd1159c6 100644
> --- a/gcc/config/arm/arm-mve-builtins-functions.h
> +++ b/gcc/config/arm/arm-mve-builtins-functions.h
> @@ -376,6 +376,156 @@ public:
> }
> };
>
> +/* Map the function directly to CODE (UNSPEC, M) for vshl-like
> + builtins. The difference with unspec_mve_function_exact_insn is
> + that this function handles MODE_r and the related unspecs.. */
> +class unspec_mve_function_exact_insn_vshl : public function_base
> +{
> +public:
> + CONSTEXPR unspec_mve_function_exact_insn_vshl (int unspec_for_sint,
> + int unspec_for_uint,
> + int unspec_for_n_sint,
> + int unspec_for_n_uint,
> + int unspec_for_m_sint,
> + int unspec_for_m_uint,
> + int unspec_for_m_n_sint,
> + int unspec_for_m_n_uint,
> + int unspec_for_m_r_sint,
> + int unspec_for_m_r_uint,
> + int unspec_for_r_sint,
> + int unspec_for_r_uint)
> + : m_unspec_for_sint (unspec_for_sint),
> + m_unspec_for_uint (unspec_for_uint),
> + m_unspec_for_n_sint (unspec_for_n_sint),
> + m_unspec_for_n_uint (unspec_for_n_uint),
> + m_unspec_for_m_sint (unspec_for_m_sint),
> + m_unspec_for_m_uint (unspec_for_m_uint),
> + m_unspec_for_m_n_sint (unspec_for_m_n_sint),
> + m_unspec_for_m_n_uint (unspec_for_m_n_uint),
> + m_unspec_for_m_r_sint (unspec_for_m_r_sint),
> + m_unspec_for_m_r_uint (unspec_for_m_r_uint),
> + m_unspec_for_r_sint (unspec_for_r_sint),
> + m_unspec_for_r_uint (unspec_for_r_uint)
> + {}
> +
> + /* The unspec code associated with signed-integer, unsigned-integer
> + and floating-point operations respectively. It covers the cases
> + with the _n suffix, and/or the _m predicate. */
> + int m_unspec_for_sint;
> + int m_unspec_for_uint;
> + int m_unspec_for_n_sint;
> + int m_unspec_for_n_uint;
> + int m_unspec_for_m_sint;
> + int m_unspec_for_m_uint;
> + int m_unspec_for_m_n_sint;
> + int m_unspec_for_m_n_uint;
> + int m_unspec_for_m_r_sint;
> + int m_unspec_for_m_r_uint;
> + int m_unspec_for_r_sint;
> + int m_unspec_for_r_uint;
> +
> + rtx
> + expand (function_expander &e) const override
> + {
> + insn_code code;
> + switch (e.pred)
> + {
> + case PRED_none:
> + switch (e.mode_suffix_id)
> + {
> + case MODE_none:
> + /* No predicate, no suffix. */
> + if (e.type_suffix (0).unsigned_p)
> + code = code_for_mve_q (m_unspec_for_uint, m_unspec_for_uint,
> e.vector_mode (0));
> + else
> + code = code_for_mve_q (m_unspec_for_sint, m_unspec_for_sint,
> e.vector_mode (0));
> + break;
> +
> + case MODE_n:
> + /* No predicate, _n suffix. */
> + if (e.type_suffix (0).unsigned_p)
> + code = code_for_mve_q_n (m_unspec_for_n_uint,
> m_unspec_for_n_uint, e.vector_mode (0));
> + else
> + code = code_for_mve_q_n (m_unspec_for_n_sint,
> m_unspec_for_n_sint, e.vector_mode (0));
> + break;
> +
> + case MODE_r:
> + /* No predicate, _r suffix. */
> + if (e.type_suffix (0).unsigned_p)
> + code = code_for_mve_q_r (m_unspec_for_r_uint,
> m_unspec_for_r_uint, e.vector_mode (0));
> + else
> + code = code_for_mve_q_r (m_unspec_for_r_sint,
> m_unspec_for_r_sint, e.vector_mode (0));
> + break;
> +
> + default:
> + gcc_unreachable ();
> + }
> + return e.use_exact_insn (code);
> +
> + case PRED_m:
> + switch (e.mode_suffix_id)
> + {
> + case MODE_none:
> + /* No suffix, "m" predicate. */
> + if (e.type_suffix (0).unsigned_p)
> + code = code_for_mve_q_m (m_unspec_for_m_uint,
> m_unspec_for_m_uint, e.vector_mode (0));
> + else
> + code = code_for_mve_q_m (m_unspec_for_m_sint,
> m_unspec_for_m_sint, e.vector_mode (0));
> + break;
> +
> + case MODE_n:
> + /* _n suffix, "m" predicate. */
> + if (e.type_suffix (0).unsigned_p)
> + code = code_for_mve_q_m_n (m_unspec_for_m_n_uint,
> m_unspec_for_m_n_uint, e.vector_mode (0));
> + else
> + code = code_for_mve_q_m_n (m_unspec_for_m_n_sint,
> m_unspec_for_m_n_sint, e.vector_mode (0));
> + break;
> +
> + case MODE_r:
> + /* _r suffix, "m" predicate. */
> + if (e.type_suffix (0).unsigned_p)
> + code = code_for_mve_q_m_r (m_unspec_for_m_r_uint,
> m_unspec_for_m_r_uint, e.vector_mode (0));
> + else
> + code = code_for_mve_q_m_r (m_unspec_for_m_r_sint,
> m_unspec_for_m_r_sint, e.vector_mode (0));
> + break;
> +
> + default:
> + gcc_unreachable ();
> + }
> + return e.use_cond_insn (code, 0);
> +
> + case PRED_x:
> + switch (e.mode_suffix_id)
> + {
> + case MODE_none:
> + /* No suffix, "x" predicate. */
> + if (e.type_suffix (0).unsigned_p)
> + code = code_for_mve_q_m (m_unspec_for_m_uint,
> m_unspec_for_m_uint, e.vector_mode (0));
> + else
> + code = code_for_mve_q_m (m_unspec_for_m_sint,
> m_unspec_for_m_sint, e.vector_mode (0));
> + break;
> +
> + case MODE_n:
> + /* _n suffix, "x" predicate. */
> + if (e.type_suffix (0).unsigned_p)
> + code = code_for_mve_q_m_n (m_unspec_for_m_n_uint,
> m_unspec_for_m_n_uint, e.vector_mode (0));
> + else
> + code = code_for_mve_q_m_n (m_unspec_for_m_n_sint,
> m_unspec_for_m_n_sint, e.vector_mode (0));
> + break;
> +
> + default:
> + gcc_unreachable ();
> + }
> + return e.use_pred_x_insn (code);
> +
> + default:
> + gcc_unreachable ();
> + }
> +
> + gcc_unreachable ();
> + }
> +};
> +
> } /* end namespace arm_mve */
>
> /* Declare the global function base NAME, creating it from an instance
> --
> 2.34.1
next prev parent reply other threads:[~2023-05-05 10:57 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 8:39 [PATCH 01/23] arm: [MVE intrinsics] add binary_round_lshift shape Christophe Lyon
2023-05-05 8:39 ` [PATCH 02/23] arm: [MVE intrinsics] factorize vqrshlq vrshlq Christophe Lyon
2023-05-05 9:58 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 03/23] arm: [MVE intrinsics] rework vrshlq vqrshlq Christophe Lyon
2023-05-05 9:59 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 04/23] arm: [MVE intrinsics] factorize vqshlq vshlq Christophe Lyon
2023-05-05 10:00 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 05/23] arm: [MVE intrinsics] rework vqrdmulhq Christophe Lyon
2023-05-05 10:01 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 06/23] arm: [MVE intrinsics] factorize vabdq Christophe Lyon
2023-05-05 10:48 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 07/23] arm: [MVE intrinsics] rework vabdq Christophe Lyon
2023-05-05 10:49 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 08/23] arm: [MVE intrinsics] add binary_lshift shape Christophe Lyon
2023-05-05 10:51 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 09/23] arm: [MVE intrinsics] add support for MODE_r Christophe Lyon
2023-05-05 10:55 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 10/23] arm: [MVE intrinsics] add binary_lshift_r shape Christophe Lyon
2023-05-05 10:56 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 11/23] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vshl Christophe Lyon
2023-05-05 10:56 ` Kyrylo Tkachov [this message]
2023-05-05 8:39 ` [PATCH 12/23] arm: [MVE intrinsics] rework vqshlq vshlq Christophe Lyon
2023-05-05 10:58 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 13/23] arm: [MVE intrinsics] factorize vmaxq vminq Christophe Lyon
2023-05-05 10:58 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 14/23] arm: [MVE intrinsics] rework " Christophe Lyon
2023-05-05 10:59 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 15/23] arm: [MVE intrinsics] add binary_rshift_narrow shape Christophe Lyon
2023-05-05 11:00 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 16/23] arm: [MVE intrinsics] factorize vshrntq vshrnbq vrshrnbq vrshrntq vqshrnbq vqshrntq vqrshrnbq vqrshrntq Christophe Lyon
2023-05-05 11:00 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 17/23] arm: [MVE intrinsics] rework vshrnbq vshrntq " Christophe Lyon
2023-05-05 11:02 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 18/23] arm: [MVE intrinsics] add binary_rshift_narrow_unsigned shape Christophe Lyon
2023-05-05 11:03 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 19/23] arm: [MVE intrinsics] factorize vqrshrunb vqrshrunt vqshrunb vqshrunt Christophe Lyon
2023-05-05 11:04 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 20/23] arm: [MVE intrinsics] rework vqrshrunbq vqrshruntq vqshrunbq vqshruntq Christophe Lyon
2023-05-05 11:05 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 21/23] arm: [MVE intrinsics] add binary_rshift shape Christophe Lyon
2023-05-05 11:05 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 22/23] arm: [MVE intrinsics] factorize vsrhrq vrshrq Christophe Lyon
2023-05-05 11:06 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 23/23] arm: [MVE intrinsics] rework vshrq vrshrq Christophe Lyon
2023-05-05 11:07 ` Kyrylo Tkachov
2023-05-05 9:55 ` [PATCH 01/23] arm: [MVE intrinsics] add binary_round_lshift shape Kyrylo Tkachov
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