From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Christophe Lyon <Christophe.Lyon@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
Richard Sandiford <Richard.Sandiford@arm.com>
Cc: Christophe Lyon <Christophe.Lyon@arm.com>
Subject: RE: [PATCH 13/23] arm: [MVE intrinsics] factorize vmaxq vminq
Date: Fri, 5 May 2023 10:58:44 +0000 [thread overview]
Message-ID: <PAXPR08MB6926F0C8870B82751E2C72F393729@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20230505083930.101210-13-christophe.lyon@arm.com>
> -----Original Message-----
> From: Christophe Lyon <christophe.lyon@arm.com>
> Sent: Friday, May 5, 2023 9:39 AM
> To: gcc-patches@gcc.gnu.org; Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>;
> Richard Earnshaw <Richard.Earnshaw@arm.com>; Richard Sandiford
> <Richard.Sandiford@arm.com>
> Cc: Christophe Lyon <Christophe.Lyon@arm.com>
> Subject: [PATCH 13/23] arm: [MVE intrinsics] factorize vmaxq vminq
>
> Factorize vmaxq and vminq so that they use the same pattern.
Ok.
Thanks,
Kyrill
>
> 2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
>
> gcc/
> * config/arm/iterators.md (MAX_MIN_SU): New.
> (max_min_su_str): New.
> (max_min_supf): New.
> * config/arm/mve.md (mve_vmaxq_s<mode>,
> mve_vmaxq_u<mode>)
> (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
> (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
> ---
> gcc/config/arm/iterators.md | 11 ++++++++++
> gcc/config/arm/mve.md | 44 +++++--------------------------------
> 2 files changed, 16 insertions(+), 39 deletions(-)
>
> diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
> index 3133642ea82..9ff61e0573b 100644
> --- a/gcc/config/arm/iterators.md
> +++ b/gcc/config/arm/iterators.md
> @@ -330,6 +330,9 @@ (define_code_iterator FCVT [unsigned_float float])
> ;; Saturating addition, subtraction
> (define_code_iterator SSPLUSMINUS [ss_plus ss_minus])
>
> +;; Max/Min iterator, to factorize MVE patterns
> +(define_code_iterator MAX_MIN_SU [smax umax smin umin])
> +
> ;; MVE integer binary operations.
> (define_code_iterator MVE_INT_BINARY_RTX [plus minus mult])
>
> @@ -1271,6 +1274,14 @@ (define_code_attr float_sup [(unsigned_float "u")
> (float "s")])
>
> (define_code_attr float_SUP [(unsigned_float "U") (float "S")])
>
> +;; max/min for MVE
> +(define_code_attr max_min_su_str [(smax "vmax") (umax "vmax") (smin
> "vmin") (umin "vmin")])
> +
> +(define_code_attr max_min_supf [
> + (smax "s") (umax "u")
> + (smin "s") (umin "u")
> + ])
> +
> ;;----------------------------------------------------------------------------
> ;; Int attributes
> ;;----------------------------------------------------------------------------
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index c8cb4e430ac..44409b40e5f 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -1106,29 +1106,20 @@ (define_insn "mve_vmaxavq_s<mode>"
> ])
>
> ;;
> -;; [vmaxq_u, vmaxq_s])
> +;; [vmaxq_u, vmaxq_s]
> +;; [vminq_s, vminq_u]
> ;;
> -(define_insn "mve_vmaxq_s<mode>"
> +(define_insn "mve_<max_min_su_str>q_<max_min_supf><mode>"
> [
> (set (match_operand:MVE_2 0 "s_register_operand" "=w")
> - (smax:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")
> + (MAX_MIN_SU:MVE_2 (match_operand:MVE_2 1
> "s_register_operand" "w")
> (match_operand:MVE_2 2 "s_register_operand" "w")))
> ]
> "TARGET_HAVE_MVE"
> - "vmax.%#<V_s_elem>\t%q0, %q1, %q2"
> + "<max_min_su_str>.<max_min_supf>%#<V_sz_elem>\t%q0, %q1, %q2"
> [(set_attr "type" "mve_move")
> ])
>
> -(define_insn "mve_vmaxq_u<mode>"
> - [
> - (set (match_operand:MVE_2 0 "s_register_operand" "=w")
> - (umax:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")
> - (match_operand:MVE_2 2 "s_register_operand" "w")))
> - ]
> - "TARGET_HAVE_MVE"
> - "vmax.%#<V_u_elem>\t%q0, %q1, %q2"
> - [(set_attr "type" "mve_move")
> -])
>
> ;;
> ;; [vmaxvq_u, vmaxvq_s])
> @@ -1175,31 +1166,6 @@ (define_insn "mve_vminavq_s<mode>"
> [(set_attr "type" "mve_move")
> ])
>
> -;;
> -;; [vminq_s, vminq_u])
> -;;
> -(define_insn "mve_vminq_s<mode>"
> - [
> - (set (match_operand:MVE_2 0 "s_register_operand" "=w")
> - (smin:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")
> - (match_operand:MVE_2 2 "s_register_operand" "w")))
> - ]
> - "TARGET_HAVE_MVE"
> - "vmin.%#<V_s_elem>\t%q0, %q1, %q2"
> - [(set_attr "type" "mve_move")
> -])
> -
> -(define_insn "mve_vminq_u<mode>"
> - [
> - (set (match_operand:MVE_2 0 "s_register_operand" "=w")
> - (umin:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")
> - (match_operand:MVE_2 2 "s_register_operand" "w")))
> - ]
> - "TARGET_HAVE_MVE"
> - "vmin.%#<V_u_elem>\t%q0, %q1, %q2"
> - [(set_attr "type" "mve_move")
> -])
> -
> ;;
> ;; [vminvq_u, vminvq_s])
> ;;
> --
> 2.34.1
next prev parent reply other threads:[~2023-05-05 10:58 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 8:39 [PATCH 01/23] arm: [MVE intrinsics] add binary_round_lshift shape Christophe Lyon
2023-05-05 8:39 ` [PATCH 02/23] arm: [MVE intrinsics] factorize vqrshlq vrshlq Christophe Lyon
2023-05-05 9:58 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 03/23] arm: [MVE intrinsics] rework vrshlq vqrshlq Christophe Lyon
2023-05-05 9:59 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 04/23] arm: [MVE intrinsics] factorize vqshlq vshlq Christophe Lyon
2023-05-05 10:00 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 05/23] arm: [MVE intrinsics] rework vqrdmulhq Christophe Lyon
2023-05-05 10:01 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 06/23] arm: [MVE intrinsics] factorize vabdq Christophe Lyon
2023-05-05 10:48 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 07/23] arm: [MVE intrinsics] rework vabdq Christophe Lyon
2023-05-05 10:49 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 08/23] arm: [MVE intrinsics] add binary_lshift shape Christophe Lyon
2023-05-05 10:51 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 09/23] arm: [MVE intrinsics] add support for MODE_r Christophe Lyon
2023-05-05 10:55 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 10/23] arm: [MVE intrinsics] add binary_lshift_r shape Christophe Lyon
2023-05-05 10:56 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 11/23] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vshl Christophe Lyon
2023-05-05 10:56 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 12/23] arm: [MVE intrinsics] rework vqshlq vshlq Christophe Lyon
2023-05-05 10:58 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 13/23] arm: [MVE intrinsics] factorize vmaxq vminq Christophe Lyon
2023-05-05 10:58 ` Kyrylo Tkachov [this message]
2023-05-05 8:39 ` [PATCH 14/23] arm: [MVE intrinsics] rework " Christophe Lyon
2023-05-05 10:59 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 15/23] arm: [MVE intrinsics] add binary_rshift_narrow shape Christophe Lyon
2023-05-05 11:00 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 16/23] arm: [MVE intrinsics] factorize vshrntq vshrnbq vrshrnbq vrshrntq vqshrnbq vqshrntq vqrshrnbq vqrshrntq Christophe Lyon
2023-05-05 11:00 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 17/23] arm: [MVE intrinsics] rework vshrnbq vshrntq " Christophe Lyon
2023-05-05 11:02 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 18/23] arm: [MVE intrinsics] add binary_rshift_narrow_unsigned shape Christophe Lyon
2023-05-05 11:03 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 19/23] arm: [MVE intrinsics] factorize vqrshrunb vqrshrunt vqshrunb vqshrunt Christophe Lyon
2023-05-05 11:04 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 20/23] arm: [MVE intrinsics] rework vqrshrunbq vqrshruntq vqshrunbq vqshruntq Christophe Lyon
2023-05-05 11:05 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 21/23] arm: [MVE intrinsics] add binary_rshift shape Christophe Lyon
2023-05-05 11:05 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 22/23] arm: [MVE intrinsics] factorize vsrhrq vrshrq Christophe Lyon
2023-05-05 11:06 ` Kyrylo Tkachov
2023-05-05 8:39 ` [PATCH 23/23] arm: [MVE intrinsics] rework vshrq vrshrq Christophe Lyon
2023-05-05 11:07 ` Kyrylo Tkachov
2023-05-05 9:55 ` [PATCH 01/23] arm: [MVE intrinsics] add binary_round_lshift shape Kyrylo Tkachov
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