[Patch 2/8, Arm, GCC] Add Armv8.1-M Mainline target feature +pacbti. [Was RE: [Patch 1/7, Arm, GCC] Add Armv8.1-M Mainline target feature +pacbti.]

[Patch 2/8, Arm, GCC] Add Armv8.1-M Mainline target feature +pacbti. [Was RE: [Patch 1/7, Arm, GCC] Add Armv8.1-M Mainline target feature +pacbti.]

[Tejas Belagod]

[-- Attachment #1: Type: text/plain, Size: 1549 bytes --]



> -----Original Message-----
> From: Richard Earnshaw <Richard.Earnshaw@arm.com>
> Sent: Monday, October 11, 2021 1:29 PM
> To: Tejas Belagod <Tejas.Belagod@arm.com>; gcc-patches@gcc.gnu.org
> Subject: Re: [Patch 1/7, Arm, GCC] Add Armv8.1-M Mainline target feature
> +pacbti.
> 
> On 08/10/2021 13:17, Tejas Belagod via Gcc-patches wrote:
> > Hi,
> >
> > This patch adds the -march feature +pacbti to Armv8.1-M Mainline.
> > This feature enables pointer signing and authentication instructions
> > on M-class architectures.
> >
> > Tested on arm-none-eabi. OK for trunk?
> >
> > 2021-10-04  Tejas Belagod  <tbelagod@arm.com>
> >
> > gcc/Changelog:
> >
> > 	* config/arm/arm-cpus.in: Define new feature pacbti.
> > 	* config/arm/arm.h (TARGET_HAVE_PACBTI): New.
> >
> 
> "+pacbti" needs to be documented in invoke.texi at the appropriate place.
> 

Thanks for the reviews.

This patch adds the -march feature +pacbti to Armv8.1-M Mainline.
This feature enables pointer signing and authentication instructions
on M-class architectures.

2021-10-25  Tejas Belagod  <tbelagod@arm.com>

gcc/Changelog:

	* config/arm/arm-cpus.in: Define new feature pacbti.
	* config/arm/arm.h (TARGET_HAVE_PACBTI): New.
	* doc/invoke.texi: Document new feature pacbti.



Tested the following configurations, OK for trunk?

-mthumb/-march=armv8.1-m.main+pacbti/-mfloat-abi=soft
-marm/-march=armv7-a/-mfpu=vfpv3-d16/-mfloat-abi=softfp
mcmodel=small and tiny
aarch64-none-linux-gnu native test and bootstrap


> R.

[-- Attachment #2: pacbti.txt --]
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diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index d0d0d0f1c7e4176fc4aa30d82394fe938b083a59..8a0e9c79682766ee2bec3fd7ba6ed67dff69dbad 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -223,6 +223,10 @@ define feature cdecp5
 define feature cdecp6
 define feature cdecp7
 
+# M-profile control flow integrity extensions (PAC/AUT/BTI).
+# Optional from Armv8.1-M Mainline.
+define feature pacbti
+
 # Feature groups.  Conventionally all (or mostly) upper case.
 # ALL_FPU lists all the feature bits associated with the floating-point
 # unit; these will all be removed if the floating-point unit is disabled
@@ -741,6 +745,7 @@ begin arch armv8.1-m.main
  option nofp remove ALL_FP
  option mve add MVE
  option mve.fp add MVE_FP
+ option pacbti add pacbti
  option cdecp0 add cdecp0
  option cdecp1 add cdecp1
  option cdecp2 add cdecp2
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 015299c15346f1bea59d70fdcb1d19545473b23b..8e6ef41f6b065217d1af3f4f1cb85b2d8fbd0dc0 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -335,6 +335,12 @@ emission of floating point pcs attributes.  */
 						isa_bit_mve_float) \
 			       && !TARGET_GENERAL_REGS_ONLY)
 
+/* Non-zero if this target supports Armv8.1-M Mainline pointer-signing
+   extension.  */
+#define TARGET_HAVE_PACBTI (arm_arch8_1m_main \
+			    && bitmap_bit_p (arm_active_target.isa, \
+					     isa_bit_pacbti))
+
 /* MVE have few common instructions as VFP, like VLDM alias VPOP, VLDR, VSTM
    alia VPUSH, VSTR and VMOV, VMSR and VMRS.  In the same manner it updates few
    registers such as FPCAR, FPCCR, FPDSCR, FPSCR, MVFR0, MVFR1 and MVFR2.  All
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 71992b8c59749f5508a3c6a1b1792910652eac57..27df8cf5bee79c2abac8b81c1ac54f1c3e50c628 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -20469,6 +20469,9 @@ Disable the floating-point extension.
 @item +cdecp0, +cdecp1, ... , +cdecp7
 Enable the Custom Datapath Extension (CDE) on selected coprocessors according
 to the numbers given in the options in the range 0 to 7.
+
+@item +pacbti
+Enable the Pointer Authentication and Branch Target Identification Extension.
 @end table
 
 @item  armv8-m.main

Re: [Patch 2/8, Arm, GCC] Add Armv8.1-M Mainline target feature +pacbti. [Was RE: [Patch 1/7, Arm, GCC] Add Armv8.1-M Mainline target feature +pacbti.]

[Richard Earnshaw]

On 28/10/2021 12:41, Tejas Belagod via Gcc-patches wrote:
> 
> 
>> -----Original Message-----
>> From: Richard Earnshaw <Richard.Earnshaw@arm.com>
>> Sent: Monday, October 11, 2021 1:29 PM
>> To: Tejas Belagod <Tejas.Belagod@arm.com>; gcc-patches@gcc.gnu.org
>> Subject: Re: [Patch 1/7, Arm, GCC] Add Armv8.1-M Mainline target feature
>> +pacbti.
>>
>> On 08/10/2021 13:17, Tejas Belagod via Gcc-patches wrote:
>>> Hi,
>>>
>>> This patch adds the -march feature +pacbti to Armv8.1-M Mainline.
>>> This feature enables pointer signing and authentication instructions
>>> on M-class architectures.
>>>
>>> Tested on arm-none-eabi. OK for trunk?
>>>
>>> 2021-10-04  Tejas Belagod  <tbelagod@arm.com>
>>>
>>> gcc/Changelog:
>>>
>>> 	* config/arm/arm-cpus.in: Define new feature pacbti.
>>> 	* config/arm/arm.h (TARGET_HAVE_PACBTI): New.
>>>
>>
>> "+pacbti" needs to be documented in invoke.texi at the appropriate place.
>>
> 
> Thanks for the reviews.
> 
> This patch adds the -march feature +pacbti to Armv8.1-M Mainline.
> This feature enables pointer signing and authentication instructions
> on M-class architectures.
> 
> 2021-10-25  Tejas Belagod  <tbelagod@arm.com>
> 
> gcc/Changelog:
> 
> 	* config/arm/arm-cpus.in: Define new feature pacbti.
> 	* config/arm/arm.h (TARGET_HAVE_PACBTI): New.
> 	* doc/invoke.texi: Document new feature pacbti.

This isn't in the correct style:

gcc/Changelog:

	* config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
	* config/arm/arm-cpus.in (pacbti): New feature.
	* doc/invoke.texi (Arm Options): Document it.

would be better.

> 
> 
> Tested the following configurations, OK for trunk?
> 
> -mthumb/-march=armv8.1-m.main+pacbti/-mfloat-abi=soft
> -marm/-march=armv7-a/-mfpu=vfpv3-d16/-mfloat-abi=softfp
> mcmodel=small and tiny
> aarch64-none-linux-gnu native test and bootstrap
> 
> 
>> R.

Otherwise OK.

R.