> -----Original Message----- > From: Gcc-patches bounces+belagod=gcc.gnu.org@gcc.gnu.org> On Behalf Of Tejas Belagod via > Gcc-patches > Sent: Friday, October 8, 2021 1:18 PM > To: gcc-patches@gcc.gnu.org > Subject: [Patch 5/7, Arm. GCC] Add pointer authentication for stack- > unwinding runtime. > > Hi, > > This patch adds authentication for when the stack is unwound when an > exception is taken. All the changes here are done to the runtime code in > libgcc's unwinder code for Arm target. All the changes are guarded under > defined (__ARM_FEATURE_PAC_DEFAULT) and activates only if the +pacbti > feature is switched on for the architecture. This means that switching on the > target feature via -march or -mcpu is sufficient and -mbranch-protection > need not be enabled. This ensures that the unwinder is authenticated only if > the PACBTI instructions are available in the non-NOP space as it uses AUTG. > Just generating PAC/AUT instructions using -mbranch-protection will not > enable authentication on the unwinder. > > Tested on arm-none-eabi. OK for trunk? > > 2021-10-04 Tejas Belagod > > gcc/ChangeLog: > > * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): > Introduce > new pseudo register class _UVRSC_PAC. > * libgcc/config/arm/pr-support.c (__gnu_unwind_execute): Decode > exception opcode (0xb4) for saving RA_AUTH_CODE and > authenticate > with AUTG if found. > * libgcc/config/arm/unwind-arm.c (struct pseudo_regs): New. > (phase1_vrs): Introduce new field to store pseudo-reg state. > (phase2_vrs): Likewise. > (_Unwind_VRS_Get): Load pseudo register state from virtual reg set. > (_Unwind_VRS_Set): Store pseudo register state to virtual reg set. > (_Unwind_VRS_Pop): Load pseudo register value from stack into > VRS. Rebased and respin based on reviews for previous patches. This patch adds authentication for when the stack is unwound when an exception is taken. All the changes here are done to the runtime code in libgcc's unwinder code for Arm target. All the changes are guarded under defined (__ARM_FEATURE_PAUTH) and activates only if the +pacbti feature is switched on for the architecture. This means that switching on the target feature via -march or -mcpu is sufficient and -mbranch-protection need not be enabled. This ensures that the unwinder is authenticated only if the PACBTI instructions are available in the non-NOP space as it uses AUTG. Just generating PAC/AUT instructions using -mbranch-protection will not enable authentication on the unwinder. 2021-10-25 Tejas Belagod gcc/ChangeLog: * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce new pseudo register class _UVRSC_PAC. * libgcc/config/arm/pr-support.c (__gnu_unwind_execute): Decode exception opcode (0xb4) for saving RA_AUTH_CODE and authenticate with AUTG if found. * libgcc/config/arm/unwind-arm.c (struct pseudo_regs): New. (phase1_vrs): Introduce new field to store pseudo-reg state. (phase2_vrs): Likewise. (_Unwind_VRS_Get): Load pseudo register state from virtual reg set. (_Unwind_VRS_Set): Store pseudo register state to virtual reg set. (_Unwind_VRS_Pop): Load pseudo register value from stack into VRS. Tested the following configurations, OK for trunk? -mthumb/-march=armv8.1-m.main+pacbti/-mfloat-abi=soft -marm/-march=armv7-a/-mfpu=vfpv3-d16/-mfloat-abi=softfp mcmodel=small and tiny aarch64-none-linux-gnu native test and bootstrap Thanks, Tejas.