public inbox for gcc-patches@gcc.gnu.org
 help / color / mirror / Atom feed
From: "Zhang, Annita" <annita.zhang@intel.com>
To: Florian Weimer <fweimer@redhat.com>, Hongtao Liu <crazylht@gmail.com>
Cc: "Beulich, Jan" <JBeulich@suse.com>,
	"Jiang, Haochen" <haochen.jiang@intel.com>,
	"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
	"ubizjak@gmail.com" <ubizjak@gmail.com>,
	"Liu, Hongtao" <hongtao.liu@intel.com>,
	"Wang, Phoebe" <phoebe.wang@intel.com>,
	x86-64-abi <x86-64-abi@googlegroups.com>,
	llvm-dev <llvm-dev@lists.llvm.org>,
	Craig Topper <craig.topper@gmail.com>,
	Joseph Myers <joseph@codesourcery.com>
Subject: RE: Intel AVX10.1 Compiler Design and Support
Date: Wed, 9 Aug 2023 10:17:51 +0000	[thread overview]
Message-ID: <PH0PR11MB507705FE7F5DC3FE0067C5618612A@PH0PR11MB5077.namprd11.prod.outlook.com> (raw)
In-Reply-To: <87h6p81sr0.fsf@oldenburg.str.redhat.com>



> -----Original Message-----
> From: Florian Weimer <fweimer@redhat.com>
> Sent: Wednesday, August 9, 2023 5:16 PM
> To: Hongtao Liu <crazylht@gmail.com>
> Cc: Beulich, Jan <JBeulich@suse.com>; Jiang, Haochen
> <haochen.jiang@intel.com>; gcc-patches@gcc.gnu.org; ubizjak@gmail.com;
> Liu, Hongtao <hongtao.liu@intel.com>; Zhang, Annita
> <annita.zhang@intel.com>; Wang, Phoebe <phoebe.wang@intel.com>; x86-
> 64-abi <x86-64-abi@googlegroups.com>; llvm-dev <llvm-dev@lists.llvm.org>;
> Craig Topper <craig.topper@gmail.com>; Joseph Myers
> <joseph@codesourcery.com>
> Subject: Re: Intel AVX10.1 Compiler Design and Support
> 
> * Hongtao Liu:
> 
> > On Wed, Aug 9, 2023 at 3:17 PM Jan Beulich <jbeulich@suse.com> wrote:
> >> Aiui these ABI levels were intended to be incremental, i.e. higher
> >> versions would include everything earlier ones cover. Without such a
> >> guarantee, how would you propose compatibility checks to be
> >> implemented in a way
> 
> Correct, this was the intent.  But it's mostly to foster adoption and make it
> easier for developers to pick the variants that they want to target custom
> builds.  If it's an ascending chain, the trade-offs are simpler.
> 
> > Are there many software implemenation based on this assumption?
> > At least in GCC, it's not a big problem, we can adjust code for the
> > new micro-architecture level.
> 
> The glibc framework can deal with alternate choices in principle, although I'd
> prefer not to go there for the reasons indicated.
> 
> >> applicable both forwards and backwards? If a new level is wanted
> >> here, then I guess it could only be something like v3.5.
> 
> > But if we use avx10.1 as v3.5, it's still not subset of
> > x86-64-v4(avx10.1 contains avx512fp16,avx512bf16 .etc which are not in
> > x86-64-v4), there will be still a diverge.
> > Then 256-bit of x86-64-v4 as v3.5? that's too weired to me.
> 
> The question is whether you want to mandate the 16-bit floating point
> extensions.  You might get better adoption if you stay compatible with shipping
> CPUs.  Furthermore, the 256-bit tuning apparently benefits current Intel CPUs,
> even though they can do 512-bit vectors.
> 
> (The thread subject is a bit misleading for this sub-topic, by the way.)
> 
> Thanks,
> Florian

Since 256bit and 512bit are diverged from AVX10.1 and will continue in the future AVX10 versions, I think it's hard to keep a single version number to cover both and increase monotonically. Hence I'd like to suggest x86-64-v5 for 512bit and x86-64-v5-256 for 256bit, and so on. 

Thx,
Annita



 

  parent reply	other threads:[~2023-08-09 10:17 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-08  7:13 Haochen Jiang
2023-08-08  7:13 ` [PATCH 1/3] Initial support for AVX10.1 Haochen Jiang
2023-08-16  2:29   ` Hongtao Liu
2023-08-08  7:13 ` [PATCH 2/3] Emit a warning when disabling AVX512 with AVX10 enabled or disabling AVX10 with AVX512 enabled Haochen Jiang
2023-08-16  2:30   ` Hongtao Liu
2023-08-08  7:13 ` [PATCH 3/3] Emit a warning when AVX10 options conflict in vector width Haochen Jiang
2023-08-16  2:30   ` Hongtao Liu
2023-08-08  7:19 ` [PATCH 1/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins Haochen Jiang
2023-08-08  7:20 ` [PATCH 2/6] " Haochen Jiang
2023-08-08  7:20 ` [PATCH 3/6] " Haochen Jiang
2023-08-08  7:20 ` [PATCH 4/6] " Haochen Jiang
2023-08-08  7:20 ` [PATCH 5/6] " Haochen Jiang
2023-08-08  7:20 ` [PATCH 6/6] " Haochen Jiang
2023-08-16  2:36   ` Hongtao Liu
2023-08-08  7:42 ` Intel AVX10.1 Compiler Design and Support Jakub Jelinek
2023-08-08  8:14   ` Jiang, Haochen
2023-08-08 12:44     ` Richard Biener
2023-08-09  2:06       ` Hongtao Liu
2023-08-09  2:08         ` Hongtao Liu
2023-08-09  6:30       ` Jiang, Haochen
2023-08-08 19:55 ` Joseph Myers
2023-08-09  1:21   ` Hongtao Liu
2023-08-09  2:14     ` Hongtao Liu
2023-08-09  2:18       ` Hongtao Liu
2023-08-09  3:59         ` Wang, Phoebe
2023-08-09 20:43           ` Joseph Myers
2023-08-09 20:49             ` Jakub Jelinek
2023-08-10 12:36             ` Phoebe Wang
2023-08-10 12:45               ` Richard Biener
2023-08-10 13:12                 ` Phoebe Wang
2023-08-10 13:30                   ` Jan Beulich
2023-08-10 13:52                     ` Richard Biener
2023-08-10 14:15                     ` Jiang, Haochen
2023-08-10 15:08                       ` Zhang, Annita
2023-08-10 15:18                         ` Jakub Jelinek
2023-08-10 22:16                 ` Joseph Myers
2023-08-09  4:01         ` Phoebe Wang
2023-08-09  5:37           ` Richard Biener
2023-08-09  6:24             ` Jiang, Haochen
2023-08-09  8:14             ` Florian Weimer
2023-08-09  8:24               ` Hongtao Liu
2023-08-09  7:17       ` Jan Beulich
2023-08-09  7:38         ` Hongtao Liu
2023-08-09  8:04           ` Jan Beulich
2023-08-09  9:15           ` Florian Weimer
2023-08-09 10:15             ` Hongtao Liu
2023-08-09 10:17             ` Zhang, Annita [this message]
2023-08-09 13:54               ` Michael Matz
2023-08-09 14:34                 ` Zhang, Annita
2023-08-10 15:08 ` Jiang, Haochen
2023-08-10 16:00   ` Jakub Jelinek
2023-08-19 22:44 ` ZiNgA BuRgA
2023-08-20  5:44   ` Richard Biener
2023-08-21  1:19   ` Hongtao Liu
2023-08-21  7:36     ` Richard Biener
2023-08-21  8:09       ` Jakub Jelinek
2023-08-21  8:28         ` Hongtao Liu
2023-08-21  8:37           ` Jakub Jelinek
2023-08-21  8:46             ` Hongtao Liu
2023-08-21  9:34           ` Richard Biener
2023-08-21  9:36             ` Richard Biener
2023-08-21  9:50             ` Hongtao Liu
2023-08-21  9:26       ` ZiNgA BuRgA
2023-08-22  3:20         ` Jiang, Haochen
2023-08-22  7:36           ` Richard Biener
2023-08-22  8:34             ` Jakub Jelinek
2023-08-22  8:35               ` Richard Biener
2023-08-22  8:52                 ` Jiang, Haochen
2023-08-22  9:23                   ` Richard Biener
2023-08-22 13:02               ` Hongtao Liu
2023-08-22 13:16                 ` Jakub Jelinek
2023-08-22 13:23                   ` Richard Biener
2023-08-22 13:35                     ` Hongtao Liu
2023-08-22 13:54                       ` Jakub Jelinek
2023-08-22 14:35                         ` Hongtao Liu
2023-08-22 15:01                           ` Jakub Jelinek
2023-08-23  1:57                             ` Jiang, Haochen
2023-08-23  2:19                               ` Hongtao Liu
2023-08-23  6:47                                 ` Jiang, Haochen
2023-08-23  8:16                               ` Jakub Jelinek
2023-08-23  8:27                                 ` Hongtao Liu
2023-08-23  7:32                           ` Richard Biener
2023-08-23  8:03                             ` Jiang, Haochen
2023-08-23  8:31                               ` Jakub Jelinek
2023-08-23  8:47                                 ` Hongtao Liu
2023-08-23  8:24                             ` Hongtao Liu
2023-08-22 14:39                       ` Hongtao Liu
2023-08-21  7:49     ` ZiNgA BuRgA

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=PH0PR11MB507705FE7F5DC3FE0067C5618612A@PH0PR11MB5077.namprd11.prod.outlook.com \
    --to=annita.zhang@intel.com \
    --cc=JBeulich@suse.com \
    --cc=craig.topper@gmail.com \
    --cc=crazylht@gmail.com \
    --cc=fweimer@redhat.com \
    --cc=gcc-patches@gcc.gnu.org \
    --cc=haochen.jiang@intel.com \
    --cc=hongtao.liu@intel.com \
    --cc=joseph@codesourcery.com \
    --cc=llvm-dev@lists.llvm.org \
    --cc=phoebe.wang@intel.com \
    --cc=ubizjak@gmail.com \
    --cc=x86-64-abi@googlegroups.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).