From: "Joseph S. Myers" <joseph@codesourcery.com>
To: gcc-patches@gcc.gnu.org
Cc: nickc@redhat.com, richard.earnshaw@arm.com,
paul@codesourcery.com, ramana.radhakrishnan@arm.com
Subject: Make ARM -mfpu= option handling use Enum
Date: Wed, 18 May 2011 20:37:00 -0000 [thread overview]
Message-ID: <Pine.LNX.4.64.1105182002570.31331@digraph.polyomino.org.uk> (raw)
This patch continues the cleanup of ARM option handling by making
-mfpu= handling use Enum, with the table of FPUs moved to a new
arm-fpus.def.
Tested building cc1 and xgcc for cross to arm-eabi. Will commit to
trunk in the absence of target maintainer objections.
contrib:
2011-05-18 Joseph Myers <joseph@codesourcery.com>
* gcc_update (gcc/config/arm/arm-tables.opt): Also depend on
gcc/config/arm/arm-fpus.def.
gcc:
2011-05-18 Joseph Myers <joseph@codesourcery.com>
* config/arm/arm-fpus.def: New.
* config/arm/genopt.sh: Generate Enum and EnumValue entries from
arm-fpus.def.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm.c (all_fpus): Move contents to arm-fpus.def.
(arm_option_override): Don't decode FPU name to string here.
* config/arm/arm.opt (mfpu=): Use Enum.
* config/arm/t-arm ($(srcdir)/config/arm/arm-tables.opt, arm.o):
Update dependencies.
Index: contrib/gcc_update
===================================================================
--- contrib/gcc_update (revision 173864)
+++ contrib/gcc_update (working copy)
@@ -80,7 +80,7 @@
gcc/config.in: gcc/cstamp-h.in
gcc/fixinc/fixincl.x: gcc/fixinc/fixincl.tpl gcc/fixinc/inclhack.def
gcc/config/arm/arm-tune.md: gcc/config/arm/arm-cores.def gcc/config/arm/gentune.sh
-gcc/config/arm/arm-tables.opt: gcc/config/arm/arm-arches.def gcc/config/arm/arm-cores.def gcc/config/arm/genopt.sh
+gcc/config/arm/arm-tables.opt: gcc/config/arm/arm-arches.def gcc/config/arm/arm-cores.def gcc/config/arm/arm-fpus.def gcc/config/arm/genopt.sh
gcc/config/m68k/m68k-tables.opt: gcc/config/m68k/m68k-devices.def gcc/config/m68k/m68k-isas.def gcc/config/m68k/m68k-microarchs.def gcc/config/m68k/genopt.sh
gcc/config/mips/mips-tables.opt: gcc/config/mips/mips-cpus.def gcc/config/mips/genopt.sh
gcc/config/rs6000/rs6000-tables.opt: gcc/config/rs6000/rs6000-cpus.def gcc/config/rs6000/genopt.sh
Index: gcc/config/arm/arm-tables.opt
===================================================================
--- gcc/config/arm/arm-tables.opt (revision 173864)
+++ gcc/config/arm/arm-tables.opt (working copy)
@@ -1,5 +1,6 @@
; -*- buffer-read-only: t -*-
-; Generated automatically by genopt.sh from arm-cores.def and arm-arches.def.
+; Generated automatically by genopt.sh from arm-cores.def, arm-arches.def
+; and arm-fpus.def.
; Copyright (C) 2011 Free Software Foundation, Inc.
;
@@ -339,3 +340,61 @@
EnumValue
Enum(arm_arch) String(iwmmxt2) Value(24)
+Enum
+Name(arm_fpu) Type(int)
+Known ARM FPUs (for use with the -mfpu= option):
+
+EnumValue
+Enum(arm_fpu) String(fpa) Value(0)
+
+EnumValue
+Enum(arm_fpu) String(fpe2) Value(1)
+
+EnumValue
+Enum(arm_fpu) String(fpe3) Value(2)
+
+EnumValue
+Enum(arm_fpu) String(maverick) Value(3)
+
+EnumValue
+Enum(arm_fpu) String(vfp) Value(4)
+
+EnumValue
+Enum(arm_fpu) String(vfpv3) Value(5)
+
+EnumValue
+Enum(arm_fpu) String(vfpv3-fp16) Value(6)
+
+EnumValue
+Enum(arm_fpu) String(vfpv3-d16) Value(7)
+
+EnumValue
+Enum(arm_fpu) String(vfpv3-d16-fp16) Value(8)
+
+EnumValue
+Enum(arm_fpu) String(vfpv3xd) Value(9)
+
+EnumValue
+Enum(arm_fpu) String(vfpv3xd-fp16) Value(10)
+
+EnumValue
+Enum(arm_fpu) String(neon) Value(11)
+
+EnumValue
+Enum(arm_fpu) String(neon-fp16) Value(12)
+
+EnumValue
+Enum(arm_fpu) String(vfpv4) Value(13)
+
+EnumValue
+Enum(arm_fpu) String(vfpv4-d16) Value(14)
+
+EnumValue
+Enum(arm_fpu) String(fpv4-sp-d16) Value(15)
+
+EnumValue
+Enum(arm_fpu) String(neon-vfpv4) Value(16)
+
+EnumValue
+Enum(arm_fpu) String(vfp3) Value(17)
+
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c (revision 173864)
+++ gcc/config/arm/arm.c (working copy)
@@ -939,25 +939,10 @@
static const struct arm_fpu_desc all_fpus[] =
{
- {"fpa", ARM_FP_MODEL_FPA, 0, VFP_NONE, false, false},
- {"fpe2", ARM_FP_MODEL_FPA, 2, VFP_NONE, false, false},
- {"fpe3", ARM_FP_MODEL_FPA, 3, VFP_NONE, false, false},
- {"maverick", ARM_FP_MODEL_MAVERICK, 0, VFP_NONE, false, false},
- {"vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, false, false},
- {"vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false},
- {"vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, true},
- {"vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, false},
- {"vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, true},
- {"vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, false},
- {"vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, true},
- {"neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , false},
- {"neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , true },
- {"vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true},
- {"vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true},
- {"fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true},
- {"neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true, true},
- /* Compatibility aliases. */
- {"vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false},
+#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16) \
+ { NAME, MODEL, REV, VFP_REGS, NEON, FP16 },
+#include "arm-fpus.def"
+#undef ARM_FPU
};
@@ -1244,8 +1229,6 @@
static void
arm_option_override (void)
{
- unsigned i;
-
if (global_options_set.x_arm_arch_option)
arm_selected_arch = &all_architectures[arm_arch_option];
@@ -1507,8 +1490,11 @@
if (TARGET_IWMMXT_ABI && !TARGET_IWMMXT)
error ("iwmmxt abi requires an iwmmxt capable cpu");
- if (target_fpu_name == NULL)
+ if (!global_options_set.x_arm_fpu_index)
{
+ const char *target_fpu_name;
+ bool ok;
+
#ifdef FPUTYPE_DEFAULT
target_fpu_name = FPUTYPE_DEFAULT;
#else
@@ -1517,23 +1503,13 @@
else
target_fpu_name = "fpe2";
#endif
- }
- arm_fpu_desc = NULL;
- for (i = 0; i < ARRAY_SIZE (all_fpus); i++)
- {
- if (streq (all_fpus[i].name, target_fpu_name))
- {
- arm_fpu_desc = &all_fpus[i];
- break;
- }
+ ok = opt_enum_arg_to_value (OPT_mfpu_, target_fpu_name, &arm_fpu_index,
+ CL_TARGET);
+ gcc_assert (ok);
}
- if (!arm_fpu_desc)
- {
- error ("invalid floating point option: -mfpu=%s", target_fpu_name);
- return;
- }
+ arm_fpu_desc = &all_fpus[arm_fpu_index];
switch (arm_fpu_desc->model)
{
Index: gcc/config/arm/genopt.sh
===================================================================
--- gcc/config/arm/genopt.sh (revision 173864)
+++ gcc/config/arm/genopt.sh (working copy)
@@ -20,7 +20,8 @@
cat <<EOF
; -*- buffer-read-only: t -*-
-; Generated automatically by genopt.sh from arm-cores.def and arm-arches.def.
+; Generated automatically by genopt.sh from arm-cores.def, arm-arches.def
+; and arm-fpus.def.
; Copyright (C) 2011 Free Software Foundation, Inc.
;
@@ -73,3 +74,22 @@
print ""
value++
}' $1/arm-arches.def
+
+cat <<EOF
+Enum
+Name(arm_fpu) Type(int)
+Known ARM FPUs (for use with the -mfpu= option):
+
+EOF
+
+awk -F'[(, ]+' 'BEGIN {
+ value = 0
+}
+/^ARM_FPU/ {
+ name = $2
+ gsub("\"", "", name)
+ print "EnumValue"
+ print "Enum(arm_fpu) String(" name ") Value(" value ")"
+ print ""
+ value++
+}' $1/arm-fpus.def
Index: gcc/config/arm/arm.opt
===================================================================
--- gcc/config/arm/arm.opt (revision 173864)
+++ gcc/config/arm/arm.opt (working copy)
@@ -145,7 +145,7 @@
Target RejectNegative Undocumented Alias(mfpu=, fpe3)
mfpu=
-Target RejectNegative Joined Var(target_fpu_name)
+Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index)
Specify the name of the target floating point hardware/format
mhard-float
Index: gcc/config/arm/t-arm
===================================================================
--- gcc/config/arm/t-arm (revision 173864)
+++ gcc/config/arm/t-arm (working copy)
@@ -52,7 +52,8 @@
$(srcdir)/config/arm/arm-tune.md
$(srcdir)/config/arm/arm-tables.opt: $(srcdir)/config/arm/genopt.sh \
- $(srcdir)/config/arm/arm-cores.def $(srcdir)/config/arm/arm-arches.def
+ $(srcdir)/config/arm/arm-cores.def $(srcdir)/config/arm/arm-arches.def \
+ $(srcdir)/config/arm/arm-fpus.def
$(SHELL) $(srcdir)/config/arm/genopt.sh $(srcdir)/config/arm > \
$(srcdir)/config/arm/arm-tables.opt
@@ -64,7 +65,7 @@
$(GGC_H) except.h $(C_PRAGMA_H) $(INTEGRATE_H) $(TM_P_H) \
$(TARGET_H) $(TARGET_DEF_H) debug.h langhooks.h $(DF_H) \
intl.h libfuncs.h $(PARAMS_H) $(OPTS_H) $(srcdir)/config/arm/arm-cores.def \
- $(srcdir)/config/arm/arm-arches.def
+ $(srcdir)/config/arm/arm-arches.def $(srcdir)/config/arm/arm-fpus.def
arm-c.o: $(srcdir)/config/arm/arm-c.c $(CONFIG_H) $(SYSTEM_H) \
coretypes.h $(TM_H) $(TREE_H) output.h $(C_COMMON_H)
Index: gcc/config/arm/arm-fpus.def
===================================================================
--- gcc/config/arm/arm-fpus.def (revision 0)
+++ gcc/config/arm/arm-fpus.def (revision 0)
@@ -0,0 +1,48 @@
+/* ARM FPU variants.
+ Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
+ 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+ Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+/* Before using #include to read this file, define a macro:
+
+ ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16)
+
+ The arguments are the fields of struct arm_fpu_desc.
+
+ genopt.sh assumes no whitespace up to the first "," in each entry. */
+
+ARM_FPU("fpa", ARM_FP_MODEL_FPA, 0, VFP_NONE, false, false)
+ARM_FPU("fpe2", ARM_FP_MODEL_FPA, 2, VFP_NONE, false, false)
+ARM_FPU("fpe3", ARM_FP_MODEL_FPA, 3, VFP_NONE, false, false)
+ARM_FPU("maverick", ARM_FP_MODEL_MAVERICK, 0, VFP_NONE, false, false)
+ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, false, false)
+ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false)
+ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, true)
+ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, false)
+ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, true)
+ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, false)
+ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, true)
+ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , false)
+ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true, true)
+ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true)
+ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true)
+ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true)
+ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true, true)
+/* Compatibility aliases. */
+ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false)
--
Joseph S. Myers
joseph@codesourcery.com
reply other threads:[~2011-05-18 20:04 UTC|newest]
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