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From: "Jiang, Haochen" <haochen.jiang@intel.com>
To: Gerald Pfeifer <gerald@pfeifer.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
	"Liu, Hongtao" <hongtao.liu@intel.com>,
	"ubizjak@gmail.com" <ubizjak@gmail.com>
Subject: RE: [PATCH] [gcc-wwwdocs]gcc-13/14: Mention Intel new ISA and march support
Date: Mon, 27 Nov 2023 01:50:54 +0000	[thread overview]
Message-ID: <SA1PR11MB59465940FCF2F2F01F96A4A9ECBDA@SA1PR11MB5946.namprd11.prod.outlook.com> (raw)
In-Reply-To: <944b1961-f4dd-41a5-0c8f-7498ef8e7c20@pfeifer.com>

> -----Original Message-----
> From: Gerald Pfeifer <gerald@pfeifer.com>
> Sent: Saturday, November 25, 2023 7:29 PM
> To: Jiang, Haochen <haochen.jiang@intel.com>
> Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <hongtao.liu@intel.com>;
> ubizjak@gmail.com
> Subject: Re: [PATCH] [gcc-wwwdocs]gcc-13/14: Mention Intel new ISA and march
> support
> 
> On Mon, 17 Jul 2023, Haochen Jiang via Gcc-patches wrote:
> >    <li>GCC now supports the Intel CPU named Granite Rapids through
> >      <code>-march=graniterapids</code>.
> > +    The switch enables the AMX-FP16, PREFETCHI ISA extensions.
> 
> Do I understand correclty that it enables AMX-FP16 and PREFETCHI?
> 
> How about changing this to use "and", as in
>   "The switch enables the AMX-FP16, PREFETCHI ISA extensions."
> ?
> 
> Let me know, and I can make the change.
> 

Ok for me.

Thx,
Haochen

> Gerald

  reply	other threads:[~2023-11-27  1:51 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-17  3:33 Haochen Jiang
2023-07-17  6:40 ` Richard Biener
2023-10-27  2:51 ` Jiang, Haochen
2023-10-27  2:54   ` Jiang, Haochen
2023-11-25 11:29 ` Gerald Pfeifer
2023-11-27  1:50   ` Jiang, Haochen [this message]
2023-12-13  5:44     ` Gerald Pfeifer

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