From: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
To: Richard Sandiford <Richard.Sandiford@arm.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
Subject: Re: [PATCH] AArch64: Add support for __builtin_roundeven[f] [PR100966]
Date: Tue, 22 Jun 2021 12:33:10 +0000 [thread overview]
Message-ID: <VE1PR08MB559956B48851237A3351FF4883099@VE1PR08MB5599.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <mptr1gzdsx0.fsf@arm.com>
Hi Richard,
> So rather than have two patterns that generate frintn, I think
> it would be better to change the existing frint_pattern entry to
> "roundeven" instead, and fix whatever the fallout is. Hopefully it
> shouldn't be too bad, since we already use the optab names for the
> other UNSPEC_FRINT* codes.
Well it requires various changes to the arm_neon headers since they use
existing intrinsics. If that is not considered a risky ABI change then here is v2:
Enable __builtin_roundeven[f] by changing existing frintn to roundeven.
Bootstrap OK and passes regress.
ChangeLog:
2021-06-18 Wilco Dijkstra <wdijkstr@arm.com>
PR target/100966
* config/aarch64/aarch64.md (frint_pattern): Update comment.
* config/aarch64/aarch64-simd-builtins.def: Change frintn to roundeven.
* config/aarch64/arm_fp16.h: Change frintn to roundeven.
* config/aarch64/arm_neon.h: Likewise.
* config/aarch64/iterators.md (frint_pattern): Use roundeven for FRINTN.
gcc/testsuite
PR target/100966
* gcc.target/aarch64/frint.x: Add roundeven tests.
* gcc.target/aarch64/frint_double.c: Likewise.
* gcc.target/aarch64/frint_float.c: Likewise.
---
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index b885bd5b38bf7ad83eb9d801284bf9b34db17210..534cc8ccb538c4fb0c208a7035020e131656260d 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -485,7 +485,7 @@
BUILTIN_VHSDF (UNOP, nearbyint, 2, FP)
BUILTIN_VHSDF (UNOP, rint, 2, FP)
BUILTIN_VHSDF (UNOP, round, 2, FP)
- BUILTIN_VHSDF_HSDF (UNOP, frintn, 2, FP)
+ BUILTIN_VHSDF_HSDF (UNOP, roundeven, 2, FP)
VAR1 (UNOP, btrunc, 2, FP, hf)
VAR1 (UNOP, ceil, 2, FP, hf)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 30effca6f3562f6870a6cc8097750e63bb0d424d..8977330b142d2cde1d2faa4a01282b01a68e25c5 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -5922,7 +5922,7 @@ (define_insn "*bswapsi2_uxtw"
;; -------------------------------------------------------------------
;; frint floating-point round to integral standard patterns.
-;; Expands to btrunc, ceil, floor, nearbyint, rint, round, frintn.
+;; Expands to btrunc, ceil, floor, nearbyint, rint, round, roundeven.
(define_insn "<frint_pattern><mode>2"
[(set (match_operand:GPF_F16 0 "register_operand" "=w")
diff --git a/gcc/config/aarch64/arm_fp16.h b/gcc/config/aarch64/arm_fp16.h
index 2afbd1203361b54d6e1315ffaa1bec21834c060e..3efa7e1f19817df1409bf781266f4e238c128f0b 100644
--- a/gcc/config/aarch64/arm_fp16.h
+++ b/gcc/config/aarch64/arm_fp16.h
@@ -333,7 +333,7 @@ vrndmh_f16 (float16_t __a)
__extension__ static __inline float16_t __attribute__ ((__always_inline__))
vrndnh_f16 (float16_t __a)
{
- return __builtin_aarch64_frintnhf (__a);
+ return __builtin_aarch64_roundevenhf (__a);
}
__extension__ static __inline float16_t __attribute__ ((__always_inline__))
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index baa30bd5a9d96c1bf04a37fb105091ea56a6444a..c88a8a627d3082d3577b0fe222381e93c35d7251 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -24657,35 +24657,35 @@ __extension__ extern __inline float32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndns_f32 (float32_t __a)
{
- return __builtin_aarch64_frintnsf (__a);
+ return __builtin_aarch64_roundevensf (__a);
}
__extension__ extern __inline float32x2_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndn_f32 (float32x2_t __a)
{
- return __builtin_aarch64_frintnv2sf (__a);
+ return __builtin_aarch64_roundevenv2sf (__a);
}
__extension__ extern __inline float64x1_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndn_f64 (float64x1_t __a)
{
- return (float64x1_t) {__builtin_aarch64_frintndf (__a[0])};
+ return (float64x1_t) {__builtin_aarch64_roundevendf (__a[0])};
}
__extension__ extern __inline float32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndnq_f32 (float32x4_t __a)
{
- return __builtin_aarch64_frintnv4sf (__a);
+ return __builtin_aarch64_roundevenv4sf (__a);
}
__extension__ extern __inline float64x2_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndnq_f64 (float64x2_t __a)
{
- return __builtin_aarch64_frintnv2df (__a);
+ return __builtin_aarch64_roundevenv2df (__a);
}
/* vrndp */
@@ -31287,14 +31287,14 @@ __extension__ extern __inline float16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndn_f16 (float16x4_t __a)
{
- return __builtin_aarch64_frintnv4hf (__a);
+ return __builtin_aarch64_roundevenv4hf (__a);
}
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndnq_f16 (float16x8_t __a)
{
- return __builtin_aarch64_frintnv8hf (__a);
+ return __builtin_aarch64_roundevenv8hf (__a);
}
__extension__ extern __inline float16x4_t
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index cac33ae812b382cd55611b0da8a6e9eac3a513c4..142823e8b067b0c00d28b3265d6a8061a386c085 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -3079,7 +3079,7 @@ (define_int_attr frint_pattern [(UNSPEC_FRINTZ "btrunc")
(UNSPEC_FRINTI "nearbyint")
(UNSPEC_FRINTX "rint")
(UNSPEC_FRINTA "round")
- (UNSPEC_FRINTN "frintn")])
+ (UNSPEC_FRINTN "roundeven")])
;; frint suffix for floating-point rounding instructions.
(define_int_attr frint_suffix [(UNSPEC_FRINTZ "z") (UNSPEC_FRINTP "p")
diff --git a/gcc/testsuite/gcc.target/aarch64/frint.x b/gcc/testsuite/gcc.target/aarch64/frint.x
index 1403740686ea3927d2c39eb2466ef8cc67e223b2..d598a25ff21b8feeca6a96de79848b2fbde7f31e 100644
--- a/gcc/testsuite/gcc.target/aarch64/frint.x
+++ b/gcc/testsuite/gcc.target/aarch64/frint.x
@@ -4,6 +4,7 @@ extern GPF SUFFIX(floor) (GPF);
extern GPF SUFFIX(nearbyint) (GPF);
extern GPF SUFFIX(rint) (GPF);
extern GPF SUFFIX(round) (GPF);
+extern GPF SUFFIX(roundeven) (GPF);
GPF test1a (GPF x)
{
@@ -64,3 +65,14 @@ GPF test6b (GPF x)
{
return SUFFIX(round)(x);
}
+
+GPF test7a (GPF x)
+{
+ return SUFFIX(__builtin_roundeven)(x);
+}
+
+GPF test7b (GPF x)
+{
+ return SUFFIX(roundeven)(x);
+}
+
diff --git a/gcc/testsuite/gcc.target/aarch64/frint_double.c b/gcc/testsuite/gcc.target/aarch64/frint_double.c
index 96139496ca454cebd41d31e8b018dab7ffa33a3f..1d28eb09e11842802ab632a7696de4407263f8ce 100644
--- a/gcc/testsuite/gcc.target/aarch64/frint_double.c
+++ b/gcc/testsuite/gcc.target/aarch64/frint_double.c
@@ -12,3 +12,4 @@
/* { dg-final { scan-assembler-times "frinti\td\[0-9\]" 2 } } */
/* { dg-final { scan-assembler-times "frintx\td\[0-9\]" 2 } } */
/* { dg-final { scan-assembler-times "frinta\td\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frintn\td\[0-9\]" 2 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/frint_float.c b/gcc/testsuite/gcc.target/aarch64/frint_float.c
index 493ec37f940a6e8cb01ea7e324073fa22099636c..530cf975db3d52c30bce43d0c40229b2b375cdea 100644
--- a/gcc/testsuite/gcc.target/aarch64/frint_float.c
+++ b/gcc/testsuite/gcc.target/aarch64/frint_float.c
@@ -12,3 +12,4 @@
/* { dg-final { scan-assembler-times "frinti\ts\[0-9\]" 2 } } */
/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]" 2 } } */
/* { dg-final { scan-assembler-times "frinta\ts\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frintn\ts\[0-9\]" 2 } } */
next prev parent reply other threads:[~2021-06-22 12:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-18 16:27 Wilco Dijkstra
2021-06-18 16:44 ` Richard Sandiford
2021-06-22 12:33 ` Wilco Dijkstra [this message]
2021-06-23 14:41 ` Richard Sandiford
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