From: Tamar Christina <Tamar.Christina@arm.com>
To: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>,
Matthew Wahab <matthew.wahab@foss.arm.com>,
gcc-patches <gcc-patches@gcc.gnu.org>
Cc: nd <nd@arm.com>, "nickc@redhat.com" <nickc@redhat.com>,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>
Subject: RE: [ARM] Enable FP16 vector arithmetic operations.
Date: Tue, 16 May 2017 08:57:00 -0000 [thread overview]
Message-ID: <VI1PR0801MB2031585659A25A16CF224FA9FFE60@VI1PR0801MB2031.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <59196BB6.30104@foss.arm.com>
Hi Kyrill,
>
> Sorry for missing this.
> For the record you are referring to the patch at:
> https://gcc.gnu.org/ml/gcc-patches/2016-09/msg01700.html
>
> This is ok and in line with what we do for the f32 intrinsics.
> My only concern was that we can do this only if
> __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
> is defined from the architecture/fpu level, but these intrinsics are already
> gated on that in arm_neon.h.
>
> This is ok for trunk if a bootstrap and test run on arm-none-linux-gnueabihf
> with current trunk shows no issues.
Thanks, bootstrapped and regtested now on arm-none-linux-gnueabihf and no issues.
I'll go ahead and commit then.
Regards,
Tamar
>
> Thanks,
> Kyrill
>
> > Tamar
> > ________________________________________
> > From: gcc-patches-owner@gcc.gnu.org <gcc-patches-owner@gcc.gnu.org>
> on
> > behalf of Matthew Wahab <matthew.wahab@foss.arm.com>
> > Sent: Friday, September 23, 2016 4:02 PM
> > To: gcc-patches
> > Subject: [ARM] Enable FP16 vector arithmetic operations.
> >
> > Hello,
> >
> > Support for the ARMv8.2-A FP16 NEON arithmetic instructions was added
> > using non-standard names for the instruction patterns. This was needed
> > because the NEON floating point semantics meant that their use by the
> > compiler for HFmode arithmetic operations needed to be restricted.
> > This follows the implementation for 32-bit NEON intructions.
> >
> > As with the 32-bit instructions, the restriction on the HFmode
> > operation can be lifted when -funsafe-math-optimizations is enabled.
> > This patch does that, defining the standard pattern names addhf3,
> > subhf3, mulhf3 and fmahf3.
> >
> > This patch also updates the NEON intrinsics to use the arithmetic
> > operations when -ffast-math is enabled. This is to make keep the
> > 16-bit support consistent with the 32-bit supportd. It is needed so
> > that code using the f16 intrinsics are subject to the same
> > optimizations as code using the f32 intrinsics would be.
> >
> > Tested for arm-none-linux-gnueabihf with native bootstrap and make
> > check on ARMv8-A and for arm-none-eabi and armeb-none-eabi with
> > cross-compiled make check on an ARMv8.2-A emulator.
> >
> > Ok for trunk?
> > Matthew
> >
> > gcc/
> > 2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
> >
> > * config/arm/arm_neon.h (vadd_f16): Use standard arithmetic
> > operations in fast-math mode.
> > (vaddq_f16): Likewise.
> > (vmul_f16): Likewise.
> > (vmulq_f16): Likewise.
> > (vsub_f16): Likewise.
> > (vsubq_f16): Likewise.
> > * config/arm/neon.md (add<mode>3): New.
> > (sub<mode>3): New.
> > (fma:<VH:mode>3): New. Also remove outdated comment.
> > (mul<mode>3): New.
> >
> > testsuite/
> > 2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
> >
> > * gcc.target/arm/armv8_2-fp16-arith-1.c: Expand comment. Update
> > expected output of vadd, vsub and vmul instructions.
> > * gcc.target/arm/armv8_2-fp16-arith-2.c: New.
> > * gcc.target/arm/armv8_2-fp16-neon-2.c: New.
> > * gcc.target/arm/armv8_2-fp16-neon-3.c: New.
next prev parent reply other threads:[~2017-05-16 8:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-23 15:11 Matthew Wahab
2017-05-02 14:50 ` Tamar Christina
2017-05-15 8:32 ` Tamar Christina
2017-05-15 8:59 ` Kyrill Tkachov
2017-05-16 8:57 ` Tamar Christina [this message]
2017-05-16 13:40 ` Christophe Lyon
2017-05-16 14:45 ` Tamar Christina
2017-05-16 16:10 ` Tamar Christina
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