From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 57660 invoked by alias); 15 May 2017 08:32:40 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 57633 invoked by uid 89); 15 May 2017 08:32:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.8 required=5.0 tests=AWL,BAYES_00,KAM_ASCII_DIVIDERS,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_PASS autolearn=no version=3.3.2 spammy=tuesday, Tuesday, U*nickc X-HELO: EUR02-VE1-obe.outbound.protection.outlook.com Received: from mail-eopbgr20059.outbound.protection.outlook.com (HELO EUR02-VE1-obe.outbound.protection.outlook.com) (40.107.2.59) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 15 May 2017 08:32:38 +0000 Received: from VI1PR0801MB2031.eurprd08.prod.outlook.com (10.173.74.140) by VI1PR0802MB2400.eurprd08.prod.outlook.com (10.175.25.148) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1084.16; Mon, 15 May 2017 08:32:38 +0000 Received: from VI1PR0801MB2031.eurprd08.prod.outlook.com ([fe80::5884:6918:5298:5bf]) by VI1PR0801MB2031.eurprd08.prod.outlook.com ([fe80::5884:6918:5298:5bf%19]) with mapi id 15.01.1084.027; Mon, 15 May 2017 08:32:37 +0000 From: Tamar Christina To: Matthew Wahab , gcc-patches CC: nd , "nickc@redhat.com" , Richard Earnshaw , Ramana Radhakrishnan , Kyrylo Tkachov Subject: Re: [ARM] Enable FP16 vector arithmetic operations. Date: Mon, 15 May 2017 08:32:00 -0000 Message-ID: References: <57E543F8.4060605@foss.arm.com>, In-Reply-To: authentication-results: foss.arm.com; dkim=none (message not signed) header.d=none;foss.arm.com; dmarc=none action=none header.from=arm.com; x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;VI1PR0802MB2400;7:4f1W4QkXGhaHin0SfVP+TJdBJfBBZPG8P8+Pzc8irk0tktSnTl3vs9zXve9SHfFZ37VH8rJFsXTqMU4FoS5QO/IJIAwtJZ2HNw/SekysWIvxwz3JnSjONp4AC1/LKF4gyfYG8EDQUXxsxfS+LlZZ7jxjdbsy8nCxWo3INup0dEUuLE9ARNhaBhgn7m0+w6oN+LBUWoQWv8aiCE3EI0fiIKHokHKQ9Cbb7pOp22eRpgQdN2o8gpwgBwoo1y5sQGkl5Z3qxW/SPV2yP5TGUHwWYW0P7Zf2RR5TSp22Hq9pXPvdva9nPPX5sQ1TRlk7KI46Qmgp1UpXpimGuK9zeaq8LQ== x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr x-ms-office365-filtering-correlation-id: dd5fe368-4609-480f-9d8c-08d49b6cf19e x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001)(2017030254075)(48565401081)(201703131423075)(201703031133081)(201702281549075);SRVR:VI1PR0802MB2400; nodisclaimer: True x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(180628864354917)(22074186197030)(183786458502308); x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(6040450)(601004)(2401047)(5005006)(8121501046)(3002001)(93006095)(93001095)(10201501046)(6055026)(6041248)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123562025)(20161123564025)(20161123560025)(20161123555025)(20161123558100)(6072148);SRVR:VI1PR0802MB2400;BCL:0;PCL:0;RULEID:;SRVR:VI1PR0802MB2400; x-forefront-prvs: 0308EE423E x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(39850400002)(39860400002)(39400400002)(39410400002)(39450400003)(377424004)(377454003)(4326008)(76176999)(478600001)(54356999)(50986999)(6506006)(6436002)(8936002)(81166006)(8676002)(33656002)(6246003)(99286003)(55016002)(54906002)(9686003)(5660300001)(53936002)(2900100001)(189998001)(3280700002)(6116002)(3660700001)(2906002)(102836003)(3846002)(38730400002)(86362001)(305945005)(2950100002)(7696004)(74316002)(72206003)(5250100002)(25786009)(66066001)(229853002)(53546009);DIR:OUT;SFP:1101;SCL:1;SRVR:VI1PR0802MB2400;H:VI1PR0801MB2031.eurprd08.prod.outlook.com;FPR:;SPF:None;MLV:sfv;LANG:en; spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-originalarrivaltime: 15 May 2017 08:32:37.5967 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0802MB2400 X-IsSubscribed: yes X-SW-Source: 2017-05/txt/msg01146.txt.bz2 Ping ________________________________________ From: gcc-patches-owner@gcc.gnu.org on beha= lf of Tamar Christina Sent: Tuesday, May 2, 2017 3:46:49 PM To: Matthew Wahab; gcc-patches Cc: nd; nickc@redhat.com; Richard Earnshaw; Ramana Radhakrishnan; Kyrylo Tk= achov Subject: Re: [ARM] Enable FP16 vector arithmetic operations. Hi All, I'm taking this one over from Matthew, I think it slipped through the crack= s before. Since it still applies cleanly on trunk I'm just pinging it. Ok for trunk? Tamar ________________________________________ From: gcc-patches-owner@gcc.gnu.org on beha= lf of Matthew Wahab Sent: Friday, September 23, 2016 4:02 PM To: gcc-patches Subject: [ARM] Enable FP16 vector arithmetic operations. Hello, Support for the ARMv8.2-A FP16 NEON arithmetic instructions was added using non-standard names for the instruction patterns. This was needed because the NEON floating point semantics meant that their use by the compiler for HFmode arithmetic operations needed to be restricted. This follows the implementation for 32-bit NEON intructions. As with the 32-bit instructions, the restriction on the HFmode operation can be lifted when -funsafe-math-optimizations is enabled. This patch does that, defining the standard pattern names addhf3, subhf3, mulhf3 and fmahf3. This patch also updates the NEON intrinsics to use the arithmetic operations when -ffast-math is enabled. This is to make keep the 16-bit support consistent with the 32-bit supportd. It is needed so that code using the f16 intrinsics are subject to the same optimizations as code using the f32 intrinsics would be. Tested for arm-none-linux-gnueabihf with native bootstrap and make check on ARMv8-A and for arm-none-eabi and armeb-none-eabi with cross-compiled make check on an ARMv8.2-A emulator. Ok for trunk? Matthew gcc/ 2016-09-23 Matthew Wahab * config/arm/arm_neon.h (vadd_f16): Use standard arithmetic operations in fast-math mode. (vaddq_f16): Likewise. (vmul_f16): Likewise. (vmulq_f16): Likewise. (vsub_f16): Likewise. (vsubq_f16): Likewise. * config/arm/neon.md (add3): New. (sub3): New. (fma:3): New. Also remove outdated comment. (mul3): New. testsuite/ 2016-09-23 Matthew Wahab * gcc.target/arm/armv8_2-fp16-arith-1.c: Expand comment. Update expected output of vadd, vsub and vmul instructions. * gcc.target/arm/armv8_2-fp16-arith-2.c: New. * gcc.target/arm/armv8_2-fp16-neon-2.c: New. * gcc.target/arm/armv8_2-fp16-neon-3.c: New.