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Mon, 31 Oct 2022 11:48:43 +0000 From: Tamar Christina To: Richard Sandiford CC: "gcc-patches@gcc.gnu.org" , nd , Richard Earnshaw , Marcus Shawcroft , Kyrylo Tkachov Subject: RE: [PATCH 2/2]AArch64 Perform more late folding of reg moves and shifts which arrive after expand Thread-Topic: [PATCH 2/2]AArch64 Perform more late folding of reg moves and shifts which arrive after expand Thread-Index: AQHYz0Gxxz6gsO9ux0CaYa3QoiPMtq3tFCqBgDuKUrA= Date: Mon, 31 Oct 2022 11:48:43 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-ts-tracking-id: DD6F233DA44C6E42B2A45293CEDE58B3.0 Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; x-ms-traffictypediagnostic: VI1PR08MB5325:EE_|AS4PR08MB8117:EE_|AM7EUR03FT023:EE_|DB9PR08MB7448:EE_ X-MS-Office365-Filtering-Correlation-Id: cc1348b9-ecc4-40d2-55a5-08dabb35e4e1 x-checkrecipientrouted: true nodisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable >=20 > The same thing ought to work for smov, so it would be good to do both. > That would also make the split between the original and new patterns more > obvious: left shift for the old pattern, right shift for the new pattern. >=20 Done, though because umov can do multilevel extensions I couldn't combine t= hem Into a single pattern. Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. Ok for master? Thanks, Tamar gcc/ChangeLog: * config/aarch64/aarch64.md (*si3_insn_uxtw): Split SHIFT into left and right ones. (*aarch64_ashr_sisd_or_int_3, *si3_insn2_sxtw): Support smov. * config/aarch64/constraints.md (Usl): New. * config/aarch64/iterators.md (LSHIFTRT_ONLY, ASHIFTRT_ONLY): New. gcc/testsuite/ChangeLog: * gcc.target/aarch64/shift-read_1.c: New test. * gcc.target/aarch64/shift-read_2.c: New test. * gcc.target/aarch64/shift-read_3.c: New test. --- inline copy of patch --- diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index c333fb1f72725992bb304c560f1245a242d5192d..2bc2684b82c35a44e0a2cea6e3a= af32d939f8cdf 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -5370,20 +5370,42 @@ (define_split =20 ;; Arithmetic right shift using SISD or Integer instruction (define_insn "*aarch64_ashr_sisd_or_int_3" - [(set (match_operand:GPI 0 "register_operand" "=3Dr,r,w,&w,&w") + [(set (match_operand:GPI 0 "register_operand" "=3Dr,r,w,r,&w,&w") (ashiftrt:GPI - (match_operand:GPI 1 "register_operand" "r,r,w,w,w") + (match_operand:GPI 1 "register_operand" "r,r,w,w,w,w") (match_operand:QI 2 "aarch64_reg_or_shift_imm_di" - "Us,r,Us,w,0")))] + "Us,r,Us,Usl,w,0")))] "" - "@ - asr\t%0, %1, %2 - asr\t%0, %1, %2 - sshr\t%0, %1, %2 - # - #" - [(set_attr "type" "bfx,shift_reg,neon_shift_imm,neon_shift_reg,neo= n_shift_reg") - (set_attr "arch" "*,*,simd,simd,simd")] + { + switch (which_alternative) + { + case 0: + return "asr\t%0, %1, %2"; + case 1: + return "asr\t%0, %1, %2"; + case 2: + return "sshr\t%0, %1, %2"; + case 3: + { + int val =3D INTVAL (operands[2]); + int size =3D 32 - val; + + if (size =3D=3D 16) + return "smov\\t%w0, %1.h[1]"; + if (size =3D=3D 8) + return "smov\\t%w0, %1.b[3]"; + gcc_unreachable (); + } + case 4: + return "#"; + case 5: + return "#"; + default: + gcc_unreachable (); + } + } + [(set_attr "type" "bfx,shift_reg,neon_shift_imm,neon_to_gp, neon_shif= t_reg,neon_shift_reg") + (set_attr "arch" "*,*,simd,simd,simd,simd")] ) =20 (define_split @@ -5493,7 +5515,7 @@ (define_insn "*rol3_insn" ;; zero_extend version of shifts (define_insn "*si3_insn_uxtw" [(set (match_operand:DI 0 "register_operand" "=3Dr,r") - (zero_extend:DI (SHIFT_no_rotate:SI + (zero_extend:DI (SHIFT_arith:SI (match_operand:SI 1 "register_operand" "r,r") (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "Uss,r"))))] "" @@ -5528,6 +5550,68 @@ (define_insn "*rolsi3_insn_uxtw" [(set_attr "type" "rotate_imm")] ) =20 +(define_insn "*si3_insn2_sxtw" + [(set (match_operand:GPI 0 "register_operand" "=3Dr,r,r") + (sign_extend:GPI (ASHIFTRT_ONLY:SI + (match_operand:SI 1 "register_operand" "w,r,r") + (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "Usl,Uss,r"))))] + "mode !=3D DImode || satisfies_constraint_Usl (operands[2])" + { + switch (which_alternative) + { + case 0: + { + int val =3D INTVAL (operands[2]); + int size =3D 32 - val; + + if (size =3D=3D 16) + return "smov\\t%0, %1.h[1]"; + if (size =3D=3D 8) + return "smov\\t%0, %1.b[3]"; + gcc_unreachable (); + } + case 1: + return "\\t%0, %1, %2"; + case 2: + return "\\t%0, %1, %2"; + default: + gcc_unreachable (); + } + } + [(set_attr "type" "neon_to_gp,bfx,shift_reg")] +) + +(define_insn "*si3_insn2_uxtw" + [(set (match_operand:GPI 0 "register_operand" "=3Dr,r,r") + (zero_extend:GPI (LSHIFTRT_ONLY:SI + (match_operand:SI 1 "register_operand" "w,r,r") + (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "Usl,Uss,r"))))] + "" + { + switch (which_alternative) + { + case 0: + { + int val =3D INTVAL (operands[2]); + int size =3D 32 - val; + + if (size =3D=3D 16) + return "umov\\t%w0, %1.h[1]"; + if (size =3D=3D 8) + return "umov\\t%w0, %1.b[3]"; + gcc_unreachable (); + } + case 1: + return "\\t%w0, %w1, %2"; + case 2: + return "\\t%w0, %w1, %w2"; + default: + gcc_unreachable (); + } + } + [(set_attr "type" "neon_to_gp,bfx,shift_reg")] +) + (define_insn "*3_insn" [(set (match_operand:SHORT 0 "register_operand" "=3Dr") (ASHIFT:SHORT (match_operand:SHORT 1 "register_operand" "r") diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constra= ints.md index ee7587cca1673208e2bfd6b503a21d0c8b69bf75..470510d691ee8589aec9b0a7103= 4677534641bea 100644 --- a/gcc/config/aarch64/constraints.md +++ b/gcc/config/aarch64/constraints.md @@ -166,6 +166,14 @@ (define_constraint "Uss" (and (match_code "const_int") (match_test "(unsigned HOST_WIDE_INT) ival < 32"))) =20 +(define_constraint "Usl" + "@internal + A constraint that matches an immediate shift constant in SImode that has= an + exact mode available to use." + (and (match_code "const_int") + (and (match_test "satisfies_constraint_Uss (op)") + (match_test "(32 - ival =3D=3D 8) || (32 - ival =3D=3D 16)")))) + (define_constraint "Usn" "A constant that can be used with a CCMN operation (once negated)." (and (match_code "const_int") diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators= .md index e904407b2169e589b7007ff966b2d9347a6d0fd2..b2682acb3bb12d584613d395200= c3b39c0e94d8d 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -2149,8 +2149,14 @@ (define_mode_attr sve_lane_pair_con [(VNx8HF "y") (V= Nx4SF "x")]) ;; This code iterator allows the various shifts supported on the core (define_code_iterator SHIFT [ashift ashiftrt lshiftrt rotatert rotate]) =20 -;; This code iterator allows all shifts except for rotates. -(define_code_iterator SHIFT_no_rotate [ashift ashiftrt lshiftrt]) +;; This code iterator allows arithmetic shifts +(define_code_iterator SHIFT_arith [ashift ashiftrt]) + +;; Singleton code iterator for only logical right shift. +(define_code_iterator LSHIFTRT_ONLY [lshiftrt]) + +;; Singleton code iterator for only arithmetic right shift. +(define_code_iterator ASHIFTRT_ONLY [ashiftrt]) =20 ;; This code iterator allows the shifts supported in arithmetic instructio= ns (define_code_iterator ASHIFT [ashift ashiftrt lshiftrt]) diff --git a/gcc/testsuite/gcc.target/aarch64/shift-read_1.c b/gcc/testsuit= e/gcc.target/aarch64/shift-read_1.c new file mode 100644 index 0000000000000000000000000000000000000000..e6e355224c96344fe1cdabd6b0d= 3d5d609cd95bd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/shift-read_1.c @@ -0,0 +1,85 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" "" { target { le } } } } */ + +#include + +/* +** foor: +** umov w0, v0.h\[3\] +** ret +*/ +unsigned int foor (uint32x4_t x) +{ + return x[1] >> 16; +} + +/* +** fool: +** umov w0, v0.s\[1\] +** lsl w0, w0, 16 +** ret +*/ +unsigned int fool (uint32x4_t x) +{ + return x[1] << 16; +} + +/* +** foor2: +** umov w0, v0.h\[7\] +** ret +*/ +unsigned short foor2 (uint32x4_t x) +{ + return x[3] >> 16; +} + +/* +** fool2: +** fmov w0, s0 +** lsl w0, w0, 16 +** ret +*/ +unsigned int fool2 (uint32x4_t x) +{ + return x[0] << 16; +} + +typedef int v4si __attribute__ ((vector_size (16))); + +/* +** bar: +** addv s0, v0.4s +** fmov w0, s0 +** lsr w1, w0, 16 +** add w0, w1, w0, uxth +** ret +*/ +int bar (v4si x) +{ + unsigned int sum =3D vaddvq_s32 (x); + return (((uint16_t)(sum & 0xffff)) + ((uint32_t)sum >> 16)); +} + +/* +** foo: +** lsr w0, w0, 16 +** ret +*/ +unsigned short foo (unsigned x) +{ + return x >> 16; +} + +/* +** foo2: +** ... +** umov w0, v[0-8]+.h\[1\] +** ret +*/ +unsigned short foo2 (v4si x) +{ + int y =3D x[0] + x[1]; + return y >> 16; +} diff --git a/gcc/testsuite/gcc.target/aarch64/shift-read_2.c b/gcc/testsuit= e/gcc.target/aarch64/shift-read_2.c new file mode 100644 index 0000000000000000000000000000000000000000..541dce9303382e047c3931ad58a= 1cbd8b3e182fb --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/shift-read_2.c @@ -0,0 +1,96 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" "" { target { le } } } } */ + +#include + +/* +** foor_1: +** smov w0, v0.h\[3\] +** ret +*/ +int32_t foor_1 (int32x4_t x) +{ + return x[1] >> 16; +} + +/* +** foor_2: +** smov x0, v0.h\[3\] +** ret +*/ +int64_t foor_2 (int32x4_t x) +{ + return x[1] >> 16; +} + + +/* +** fool: +** [su]mov w0, v0.s\[1\] +** lsl w0, w0, 16 +** ret +*/ +int fool (int32x4_t x) +{ + return x[1] << 16; +} + +/* +** foor2: +** umov w0, v0.h\[7\] +** ret +*/ +short foor2 (int32x4_t x) +{ + return x[3] >> 16; +} + +/* +** fool2: +** fmov w0, s0 +** lsl w0, w0, 16 +** ret +*/ +int fool2 (int32x4_t x) +{ + return x[0] << 16; +} + +typedef int v4si __attribute__ ((vector_size (16))); + +/* +** bar: +** addv s0, v0.4s +** fmov w0, s0 +** lsr w1, w0, 16 +** add w0, w1, w0, uxth +** ret +*/ +int bar (v4si x) +{ + unsigned int sum =3D vaddvq_s32 (x); + return (((uint16_t)(sum & 0xffff)) + ((uint32_t)sum >> 16)); +} + +/* +** foo: +** lsr w0, w0, 16 +** ret +*/ +short foo (int x) +{ + return x >> 16; +} + +/* +** foo2: +** ... +** umov w0, v[0-8]+.h\[1\] +** ret +*/ +short foo2 (v4si x) +{ + int y =3D x[0] + x[1]; + return y >> 16; +} diff --git a/gcc/testsuite/gcc.target/aarch64/shift-read_3.c b/gcc/testsuit= e/gcc.target/aarch64/shift-read_3.c new file mode 100644 index 0000000000000000000000000000000000000000..2ea81ff5b5af7794e062e471f46= b433e1d7d87ee --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/shift-read_3.c @@ -0,0 +1,60 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" "" { target { le } } } } */ + +#include + +/* +** ufoo: +** ... +** umov w0, v0.h\[1\] +** ret +*/ +uint64_t ufoo (uint32x4_t x) +{ + return (x[0] + x[1]) >> 16; +} + +/*=20 +** sfoo: +** ... +** smov x0, v0.h\[1\] +** ret +*/ +int64_t sfoo (int32x4_t x) +{ + return (x[0] + x[1]) >> 16; +} + +/*=20 +** sfoo2: +** ... +** smov w0, v0.h\[1\] +** ret +*/ +int32_t sfoo2 (int32x4_t x) +{ + return (x[0] + x[1]) >> 16; +} + +/*=20 +** ubar: +** ... +** umov w0, v0.b\[3\] +** ret +*/ +uint64_t ubar (uint32x4_t x) +{ + return (x[0] + x[1]) >> 24; +} + +/*=20 +** sbar: +** ... +** smov x0, v0.b\[3\] +** ret +*/ +int64_t sbar (int32x4_t x) +{ + return (x[0] + x[1]) >> 24; +} --_002_VI1PR08MB53254855B4410E701B78BE89FF379VI1PR08MB5325eurp_ Content-Type: application/octet-stream; name="rb15777.patch" Content-Description: rb15777.patch Content-Disposition: attachment; filename="rb15777.patch"; size=10075; creation-date="Mon, 31 Oct 2022 11:48:04 GMT"; modification-date="Mon, 31 Oct 2022 11:48:42 GMT" Content-Transfer-Encoding: base64 ZGlmZiAtLWdpdCBhL2djYy9jb25maWcvYWFyY2g2NC9hYXJjaDY0Lm1kIGIvZ2NjL2NvbmZpZy9h YXJjaDY0L2FhcmNoNjQubWQKaW5kZXggYzMzM2ZiMWY3MjcyNTk5MmJiMzA0YzU2MGYxMjQ1YTI0 MmQ1MTkyZC4uMmJjMjY4NGI4MmMzNWE0NGUwYTJjZWE2ZTNhYWYzMmQ5MzlmOGNkZiAxMDA2NDQK LS0tIGEvZ2NjL2NvbmZpZy9hYXJjaDY0L2FhcmNoNjQubWQKKysrIGIvZ2NjL2NvbmZpZy9hYXJj aDY0L2FhcmNoNjQubWQKQEAgLTUzNzAsMjAgKzUzNzAsNDIgQEAgKGRlZmluZV9zcGxpdAogCiA7 OyBBcml0aG1ldGljIHJpZ2h0IHNoaWZ0IHVzaW5nIFNJU0Qgb3IgSW50ZWdlciBpbnN0cnVjdGlv bgogKGRlZmluZV9pbnNuICIqYWFyY2g2NF9hc2hyX3Npc2Rfb3JfaW50Xzxtb2RlPjMiCi0gIFso c2V0IChtYXRjaF9vcGVyYW5kOkdQSSAwICJyZWdpc3Rlcl9vcGVyYW5kIiAiPXIscix3LCZ3LCZ3 IikKKyAgWyhzZXQgKG1hdGNoX29wZXJhbmQ6R1BJIDAgInJlZ2lzdGVyX29wZXJhbmQiICI9cixy LHcsciwmdywmdyIpCiAJKGFzaGlmdHJ0OkdQSQotCSAgKG1hdGNoX29wZXJhbmQ6R1BJIDEgInJl Z2lzdGVyX29wZXJhbmQiICJyLHIsdyx3LHciKQorCSAgKG1hdGNoX29wZXJhbmQ6R1BJIDEgInJl Z2lzdGVyX29wZXJhbmQiICJyLHIsdyx3LHcsdyIpCiAJICAobWF0Y2hfb3BlcmFuZDpRSSAyICJh YXJjaDY0X3JlZ19vcl9zaGlmdF9pbW1fZGkiCi0JCQkgICAgICAgIlVzPGNtb2RlPixyLFVzPGNt b2RlX3NpbWQ+LHcsMCIpKSldCisJCQkgICAgICAgIlVzPGNtb2RlPixyLFVzPGNtb2RlX3NpbWQ+ LFVzbCx3LDAiKSkpXQogICAiIgotICAiQAotICAgYXNyXHQlPHc+MCwgJTx3PjEsICUyCi0gICBh c3JcdCU8dz4wLCAlPHc+MSwgJTx3PjIKLSAgIHNzaHJcdCU8cnRuPjA8dmFzPiwgJTxydG4+MTx2 YXM+LCAlMgotICAgIwotICAgIyIKLSAgWyhzZXRfYXR0ciAidHlwZSIgImJmeCxzaGlmdF9yZWcs bmVvbl9zaGlmdF9pbW08cT4sbmVvbl9zaGlmdF9yZWc8cT4sbmVvbl9zaGlmdF9yZWc8cT4iKQot ICAgKHNldF9hdHRyICJhcmNoIiAiKiwqLHNpbWQsc2ltZCxzaW1kIildCisgIHsKKyAgICBzd2l0 Y2ggKHdoaWNoX2FsdGVybmF0aXZlKQorICAgIHsKKyAgICAgIGNhc2UgMDoKKwlyZXR1cm4gImFz clx0JTx3PjAsICU8dz4xLCAlMiI7CisgICAgICBjYXNlIDE6CisJcmV0dXJuICJhc3JcdCU8dz4w LCAlPHc+MSwgJTx3PjIiOworICAgICAgY2FzZSAyOgorCXJldHVybiAic3Noclx0JTxydG4+MDx2 YXM+LCAlPHJ0bj4xPHZhcz4sICUyIjsKKyAgICAgIGNhc2UgMzoKKwl7CisJICBpbnQgdmFsID0g SU5UVkFMIChvcGVyYW5kc1syXSk7CisJICBpbnQgc2l6ZSA9IDMyIC0gdmFsOworCisJICBpZiAo c2l6ZSA9PSAxNikKKwkgICAgcmV0dXJuICJzbW92XFx0JXcwLCAlMS5oWzFdIjsKKwkgIGlmIChz aXplID09IDgpCisJICAgIHJldHVybiAic21vdlxcdCV3MCwgJTEuYlszXSI7CisJICBnY2NfdW5y ZWFjaGFibGUgKCk7CisJfQorICAgICAgY2FzZSA0OgorCXJldHVybiAiIyI7CisgICAgICBjYXNl IDU6CisJcmV0dXJuICIjIjsKKyAgICAgIGRlZmF1bHQ6CisJZ2NjX3VucmVhY2hhYmxlICgpOwor ICAgIH0KKyAgfQorICBbKHNldF9hdHRyICJ0eXBlIiAiYmZ4LHNoaWZ0X3JlZyxuZW9uX3NoaWZ0 X2ltbTxxPixuZW9uX3RvX2dwLCBuZW9uX3NoaWZ0X3JlZzxxPixuZW9uX3NoaWZ0X3JlZzxxPiIp CisgICAoc2V0X2F0dHIgImFyY2giICIqLCosc2ltZCxzaW1kLHNpbWQsc2ltZCIpXQogKQogCiAo ZGVmaW5lX3NwbGl0CkBAIC01NDkzLDcgKzU1MTUsNyBAQCAoZGVmaW5lX2luc24gIipyb2w8bW9k ZT4zX2luc24iCiA7OyB6ZXJvX2V4dGVuZCB2ZXJzaW9uIG9mIHNoaWZ0cwogKGRlZmluZV9pbnNu ICIqPG9wdGFiPnNpM19pbnNuX3V4dHciCiAgIFsoc2V0IChtYXRjaF9vcGVyYW5kOkRJIDAgInJl Z2lzdGVyX29wZXJhbmQiICI9cixyIikKLQkoemVyb19leHRlbmQ6REkgKFNISUZUX25vX3JvdGF0 ZTpTSQorCSh6ZXJvX2V4dGVuZDpESSAoU0hJRlRfYXJpdGg6U0kKIAkgKG1hdGNoX29wZXJhbmQ6 U0kgMSAicmVnaXN0ZXJfb3BlcmFuZCIgInIsciIpCiAJIChtYXRjaF9vcGVyYW5kOlFJIDIgImFh cmNoNjRfcmVnX29yX3NoaWZ0X2ltbV9zaSIgIlVzcyxyIikpKSldCiAgICIiCkBAIC01NTI4LDYg KzU1NTAsNjggQEAgKGRlZmluZV9pbnNuICIqcm9sc2kzX2luc25fdXh0dyIKICAgWyhzZXRfYXR0 ciAidHlwZSIgInJvdGF0ZV9pbW0iKV0KICkKIAorKGRlZmluZV9pbnNuICIqPG9wdGFiPnNpM19p bnNuMl9zeHR3IgorICBbKHNldCAobWF0Y2hfb3BlcmFuZDpHUEkgMCAicmVnaXN0ZXJfb3BlcmFu ZCIgIj1yLHIsciIpCisJKHNpZ25fZXh0ZW5kOkdQSSAoQVNISUZUUlRfT05MWTpTSQorCSAgKG1h dGNoX29wZXJhbmQ6U0kgMSAicmVnaXN0ZXJfb3BlcmFuZCIgIncscixyIikKKwkgIChtYXRjaF9v cGVyYW5kOlFJIDIgImFhcmNoNjRfcmVnX29yX3NoaWZ0X2ltbV9zaSIgIlVzbCxVc3MsciIpKSkp XQorICAiPE1PREU+bW9kZSAhPSBESW1vZGUgfHwgc2F0aXNmaWVzX2NvbnN0cmFpbnRfVXNsIChv cGVyYW5kc1syXSkiCisgIHsKKyAgICBzd2l0Y2ggKHdoaWNoX2FsdGVybmF0aXZlKQorICAgIHsK KyAgICAgIGNhc2UgMDoKKwl7CisJICBpbnQgdmFsID0gSU5UVkFMIChvcGVyYW5kc1syXSk7CisJ ICBpbnQgc2l6ZSA9IDMyIC0gdmFsOworCisJICBpZiAoc2l6ZSA9PSAxNikKKwkgICAgcmV0dXJu ICJzbW92XFx0JTx3PjAsICUxLmhbMV0iOworCSAgaWYgKHNpemUgPT0gOCkKKwkgICAgcmV0dXJu ICJzbW92XFx0JTx3PjAsICUxLmJbM10iOworCSAgZ2NjX3VucmVhY2hhYmxlICgpOworCX0KKyAg ICAgIGNhc2UgMToKKwlyZXR1cm4gIjxzaGlmdD5cXHQlPHc+MCwgJTx3PjEsICUyIjsKKyAgICAg IGNhc2UgMjoKKwlyZXR1cm4gIjxzaGlmdD5cXHQlPHc+MCwgJTx3PjEsICU8dz4yIjsKKyAgICAg IGRlZmF1bHQ6CisJZ2NjX3VucmVhY2hhYmxlICgpOworICAgICAgfQorICB9CisgIFsoc2V0X2F0 dHIgInR5cGUiICJuZW9uX3RvX2dwLGJmeCxzaGlmdF9yZWciKV0KKykKKworKGRlZmluZV9pbnNu ICIqPG9wdGFiPnNpM19pbnNuMl91eHR3IgorICBbKHNldCAobWF0Y2hfb3BlcmFuZDpHUEkgMCAi cmVnaXN0ZXJfb3BlcmFuZCIgIj1yLHIsciIpCisJKHplcm9fZXh0ZW5kOkdQSSAoTFNISUZUUlRf T05MWTpTSQorCSAgKG1hdGNoX29wZXJhbmQ6U0kgMSAicmVnaXN0ZXJfb3BlcmFuZCIgIncscixy IikKKwkgIChtYXRjaF9vcGVyYW5kOlFJIDIgImFhcmNoNjRfcmVnX29yX3NoaWZ0X2ltbV9zaSIg IlVzbCxVc3MsciIpKSkpXQorICAiIgorICB7CisgICAgc3dpdGNoICh3aGljaF9hbHRlcm5hdGl2 ZSkKKyAgICB7CisgICAgICBjYXNlIDA6CisJeworCSAgaW50IHZhbCA9IElOVFZBTCAob3BlcmFu ZHNbMl0pOworCSAgaW50IHNpemUgPSAzMiAtIHZhbDsKKworCSAgaWYgKHNpemUgPT0gMTYpCisJ ICAgIHJldHVybiAidW1vdlxcdCV3MCwgJTEuaFsxXSI7CisJICBpZiAoc2l6ZSA9PSA4KQorCSAg ICByZXR1cm4gInVtb3ZcXHQldzAsICUxLmJbM10iOworCSAgZ2NjX3VucmVhY2hhYmxlICgpOwor CX0KKyAgICAgIGNhc2UgMToKKwlyZXR1cm4gIjxzaGlmdD5cXHQldzAsICV3MSwgJTIiOworICAg ICAgY2FzZSAyOgorCXJldHVybiAiPHNoaWZ0PlxcdCV3MCwgJXcxLCAldzIiOworICAgICAgZGVm YXVsdDoKKwlnY2NfdW5yZWFjaGFibGUgKCk7CisgICAgICB9CisgIH0KKyAgWyhzZXRfYXR0ciAi dHlwZSIgIm5lb25fdG9fZ3AsYmZ4LHNoaWZ0X3JlZyIpXQorKQorCiAoZGVmaW5lX2luc24gIio8 b3B0YWI+PG1vZGU+M19pbnNuIgogICBbKHNldCAobWF0Y2hfb3BlcmFuZDpTSE9SVCAwICJyZWdp c3Rlcl9vcGVyYW5kIiAiPXIiKQogCShBU0hJRlQ6U0hPUlQgKG1hdGNoX29wZXJhbmQ6U0hPUlQg MSAicmVnaXN0ZXJfb3BlcmFuZCIgInIiKQpkaWZmIC0tZ2l0IGEvZ2NjL2NvbmZpZy9hYXJjaDY0 L2NvbnN0cmFpbnRzLm1kIGIvZ2NjL2NvbmZpZy9hYXJjaDY0L2NvbnN0cmFpbnRzLm1kCmluZGV4 IGVlNzU4N2NjYTE2NzMyMDhlMmJmZDZiNTAzYTIxZDBjOGI2OWJmNzUuLjQ3MDUxMGQ2OTFlZTg1 ODlhZWM5YjBhNzEwMzQ2Nzc1MzQ2NDFiZWEgMTAwNjQ0Ci0tLSBhL2djYy9jb25maWcvYWFyY2g2 NC9jb25zdHJhaW50cy5tZAorKysgYi9nY2MvY29uZmlnL2FhcmNoNjQvY29uc3RyYWludHMubWQK QEAgLTE2Niw2ICsxNjYsMTQgQEAgKGRlZmluZV9jb25zdHJhaW50ICJVc3MiCiAgIChhbmQgKG1h dGNoX2NvZGUgImNvbnN0X2ludCIpCiAgICAgICAgKG1hdGNoX3Rlc3QgIih1bnNpZ25lZCBIT1NU X1dJREVfSU5UKSBpdmFsIDwgMzIiKSkpCiAKKyhkZWZpbmVfY29uc3RyYWludCAiVXNsIgorICAi QGludGVybmFsCisgIEEgY29uc3RyYWludCB0aGF0IG1hdGNoZXMgYW4gaW1tZWRpYXRlIHNoaWZ0 IGNvbnN0YW50IGluIFNJbW9kZSB0aGF0IGhhcyBhbgorICBleGFjdCBtb2RlIGF2YWlsYWJsZSB0 byB1c2UuIgorICAoYW5kIChtYXRjaF9jb2RlICJjb25zdF9pbnQiKQorICAgICAgIChhbmQgKG1h dGNoX3Rlc3QgInNhdGlzZmllc19jb25zdHJhaW50X1VzcyAob3ApIikKKwkgICAgKG1hdGNoX3Rl c3QgIigzMiAtIGl2YWwgPT0gOCkgfHwgKDMyIC0gaXZhbCA9PSAxNikiKSkpKQorCiAoZGVmaW5l X2NvbnN0cmFpbnQgIlVzbiIKICAiQSBjb25zdGFudCB0aGF0IGNhbiBiZSB1c2VkIHdpdGggYSBD Q01OIG9wZXJhdGlvbiAob25jZSBuZWdhdGVkKS4iCiAgKGFuZCAobWF0Y2hfY29kZSAiY29uc3Rf aW50IikKZGlmZiAtLWdpdCBhL2djYy9jb25maWcvYWFyY2g2NC9pdGVyYXRvcnMubWQgYi9nY2Mv Y29uZmlnL2FhcmNoNjQvaXRlcmF0b3JzLm1kCmluZGV4IGU5MDQ0MDdiMjE2OWU1ODliNzAwN2Zm OTY2YjJkOTM0N2E2ZDBmZDIuLmIyNjgyYWNiM2JiMTJkNTg0NjEzZDM5NTIwMGMzYjM5YzBlOTRk OGQgMTAwNjQ0Ci0tLSBhL2djYy9jb25maWcvYWFyY2g2NC9pdGVyYXRvcnMubWQKKysrIGIvZ2Nj L2NvbmZpZy9hYXJjaDY0L2l0ZXJhdG9ycy5tZApAQCAtMjE0OSw4ICsyMTQ5LDE0IEBAIChkZWZp bmVfbW9kZV9hdHRyIHN2ZV9sYW5lX3BhaXJfY29uIFsoVk54OEhGICJ5IikgKFZOeDRTRiAieCIp XSkKIDs7IFRoaXMgY29kZSBpdGVyYXRvciBhbGxvd3MgdGhlIHZhcmlvdXMgc2hpZnRzIHN1cHBv cnRlZCBvbiB0aGUgY29yZQogKGRlZmluZV9jb2RlX2l0ZXJhdG9yIFNISUZUIFthc2hpZnQgYXNo aWZ0cnQgbHNoaWZ0cnQgcm90YXRlcnQgcm90YXRlXSkKIAotOzsgVGhpcyBjb2RlIGl0ZXJhdG9y IGFsbG93cyBhbGwgc2hpZnRzIGV4Y2VwdCBmb3Igcm90YXRlcy4KLShkZWZpbmVfY29kZV9pdGVy YXRvciBTSElGVF9ub19yb3RhdGUgW2FzaGlmdCBhc2hpZnRydCBsc2hpZnRydF0pCis7OyBUaGlz IGNvZGUgaXRlcmF0b3IgYWxsb3dzIGFyaXRobWV0aWMgc2hpZnRzCisoZGVmaW5lX2NvZGVfaXRl cmF0b3IgU0hJRlRfYXJpdGggW2FzaGlmdCBhc2hpZnRydF0pCisKKzs7IFNpbmdsZXRvbiBjb2Rl IGl0ZXJhdG9yIGZvciBvbmx5IGxvZ2ljYWwgcmlnaHQgc2hpZnQuCisoZGVmaW5lX2NvZGVfaXRl cmF0b3IgTFNISUZUUlRfT05MWSBbbHNoaWZ0cnRdKQorCis7OyBTaW5nbGV0b24gY29kZSBpdGVy YXRvciBmb3Igb25seSBhcml0aG1ldGljIHJpZ2h0IHNoaWZ0LgorKGRlZmluZV9jb2RlX2l0ZXJh dG9yIEFTSElGVFJUX09OTFkgW2FzaGlmdHJ0XSkKIAogOzsgVGhpcyBjb2RlIGl0ZXJhdG9yIGFs bG93cyB0aGUgc2hpZnRzIHN1cHBvcnRlZCBpbiBhcml0aG1ldGljIGluc3RydWN0aW9ucwogKGRl ZmluZV9jb2RlX2l0ZXJhdG9yIEFTSElGVCBbYXNoaWZ0IGFzaGlmdHJ0IGxzaGlmdHJ0XSkKZGlm ZiAtLWdpdCBhL2djYy90ZXN0c3VpdGUvZ2NjLnRhcmdldC9hYXJjaDY0L3NoaWZ0LXJlYWRfMS5j IGIvZ2NjL3Rlc3RzdWl0ZS9nY2MudGFyZ2V0L2FhcmNoNjQvc2hpZnQtcmVhZF8xLmMKbmV3IGZp bGUgbW9kZSAxMDA2NDQKaW5kZXggMDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAw MDAwMC4uZTZlMzU1MjI0Yzk2MzQ0ZmUxY2RhYmQ2YjBkM2Q1ZDYwOWNkOTViZAotLS0gL2Rldi9u dWxsCisrKyBiL2djYy90ZXN0c3VpdGUvZ2NjLnRhcmdldC9hYXJjaDY0L3NoaWZ0LXJlYWRfMS5j CkBAIC0wLDAgKzEsODUgQEAKKy8qIHsgZGctZG8gY29tcGlsZSB9ICovCisvKiB7IGRnLWFkZGl0 aW9uYWwtb3B0aW9ucyAiLU8yIiB9ICovCisvKiB7IGRnLWZpbmFsIHsgY2hlY2stZnVuY3Rpb24t Ym9kaWVzICIqKiIgIiIgIiIgeyB0YXJnZXQgeyBsZSB9IH0gfSB9ICovCisKKyNpbmNsdWRlIDxh cm1fbmVvbi5oPgorCisvKgorKiogZm9vcjoKKyoqIAl1bW92CXcwLCB2MC5oXFszXF0KKyoqIAly ZXQKKyovCit1bnNpZ25lZCBpbnQgZm9vciAodWludDMyeDRfdCB4KQoreworICAgIHJldHVybiB4 WzFdID4+IDE2OworfQorCisvKgorKiogZm9vbDoKKyoqIAl1bW92CXcwLCB2MC5zXFsxXF0KKyoq IAlsc2wJdzAsIHcwLCAxNgorKiogCXJldAorKi8KK3Vuc2lnbmVkIGludCBmb29sICh1aW50MzJ4 NF90IHgpCit7CisgICAgcmV0dXJuIHhbMV0gPDwgMTY7Cit9CisKKy8qCisqKiBmb29yMjoKKyoq IAl1bW92CXcwLCB2MC5oXFs3XF0KKyoqIAlyZXQKKyovCit1bnNpZ25lZCBzaG9ydCBmb29yMiAo dWludDMyeDRfdCB4KQoreworICAgIHJldHVybiB4WzNdID4+IDE2OworfQorCisvKgorKiogZm9v bDI6CisqKiAJZm1vdgl3MCwgczAKKyoqIAlsc2wJdzAsIHcwLCAxNgorKiogCXJldAorKi8KK3Vu c2lnbmVkIGludCBmb29sMiAodWludDMyeDRfdCB4KQoreworICAgIHJldHVybiB4WzBdIDw8IDE2 OworfQorCit0eXBlZGVmIGludCB2NHNpIF9fYXR0cmlidXRlX18gKCh2ZWN0b3Jfc2l6ZSAoMTYp KSk7CisKKy8qCisqKiBiYXI6CisqKglhZGR2CXMwLCB2MC40cworKioJZm1vdgl3MCwgczAKKyoq CWxzcgl3MSwgdzAsIDE2CisqKglhZGQJdzAsIHcxLCB3MCwgdXh0aAorKioJcmV0CisqLworaW50 IGJhciAodjRzaSB4KQoreworICB1bnNpZ25lZCBpbnQgc3VtID0gdmFkZHZxX3MzMiAoeCk7Cisg IHJldHVybiAoKCh1aW50MTZfdCkoc3VtICYgMHhmZmZmKSkgKyAoKHVpbnQzMl90KXN1bSA+PiAx NikpOworfQorCisvKgorKiogZm9vOgorKiogCWxzcgl3MCwgdzAsIDE2CisqKiAJcmV0CisqLwor dW5zaWduZWQgc2hvcnQgZm9vICh1bnNpZ25lZCB4KQoreworICByZXR1cm4geCA+PiAxNjsKK30K KworLyoKKyoqIGZvbzI6CisqKgkuLi4KKyoqIAl1bW92CXcwLCB2WzAtOF0rLmhcWzFcXQorKiog CXJldAorKi8KK3Vuc2lnbmVkIHNob3J0IGZvbzIgKHY0c2kgeCkKK3sKKyAgaW50IHkgPSB4WzBd ICsgeFsxXTsKKyAgcmV0dXJuIHkgPj4gMTY7Cit9CmRpZmYgLS1naXQgYS9nY2MvdGVzdHN1aXRl L2djYy50YXJnZXQvYWFyY2g2NC9zaGlmdC1yZWFkXzIuYyBiL2djYy90ZXN0c3VpdGUvZ2NjLnRh cmdldC9hYXJjaDY0L3NoaWZ0LXJlYWRfMi5jCm5ldyBmaWxlIG1vZGUgMTAwNjQ0CmluZGV4IDAw MDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAuLjU0MWRjZTkzMDMzODJlMDQ3 YzM5MzFhZDU4YTFjYmQ4YjNlMTgyZmIKLS0tIC9kZXYvbnVsbAorKysgYi9nY2MvdGVzdHN1aXRl L2djYy50YXJnZXQvYWFyY2g2NC9zaGlmdC1yZWFkXzIuYwpAQCAtMCwwICsxLDk2IEBACisvKiB7 IGRnLWRvIGNvbXBpbGUgfSAqLworLyogeyBkZy1hZGRpdGlvbmFsLW9wdGlvbnMgIi1PMiIgfSAq LworLyogeyBkZy1maW5hbCB7IGNoZWNrLWZ1bmN0aW9uLWJvZGllcyAiKioiICIiICIiIHsgdGFy Z2V0IHsgbGUgfSB9IH0gfSAqLworCisjaW5jbHVkZSA8YXJtX25lb24uaD4KKworLyoKKyoqIGZv b3JfMToKKyoqIAlzbW92CXcwLCB2MC5oXFszXF0KKyoqIAlyZXQKKyovCitpbnQzMl90IGZvb3Jf MSAoaW50MzJ4NF90IHgpCit7CisgICAgcmV0dXJuIHhbMV0gPj4gMTY7Cit9CisKKy8qCisqKiBm b29yXzI6CisqKiAJc21vdgl4MCwgdjAuaFxbM1xdCisqKiAJcmV0CisqLworaW50NjRfdCBmb29y XzIgKGludDMyeDRfdCB4KQoreworICAgIHJldHVybiB4WzFdID4+IDE2OworfQorCisKKy8qCisq KiBmb29sOgorKiogCVtzdV1tb3YJdzAsIHYwLnNcWzFcXQorKiogCWxzbAl3MCwgdzAsIDE2Cisq KiAJcmV0CisqLworaW50IGZvb2wgKGludDMyeDRfdCB4KQoreworICAgIHJldHVybiB4WzFdIDw8 IDE2OworfQorCisvKgorKiogZm9vcjI6CisqKiAJdW1vdgl3MCwgdjAuaFxbN1xdCisqKiAJcmV0 CisqLworc2hvcnQgZm9vcjIgKGludDMyeDRfdCB4KQoreworICAgIHJldHVybiB4WzNdID4+IDE2 OworfQorCisvKgorKiogZm9vbDI6CisqKiAJZm1vdgl3MCwgczAKKyoqIAlsc2wJdzAsIHcwLCAx NgorKiogCXJldAorKi8KK2ludCBmb29sMiAoaW50MzJ4NF90IHgpCit7CisgICAgcmV0dXJuIHhb MF0gPDwgMTY7Cit9CisKK3R5cGVkZWYgaW50IHY0c2kgX19hdHRyaWJ1dGVfXyAoKHZlY3Rvcl9z aXplICgxNikpKTsKKworLyoKKyoqIGJhcjoKKyoqCWFkZHYJczAsIHYwLjRzCisqKglmbW92CXcw LCBzMAorKioJbHNyCXcxLCB3MCwgMTYKKyoqCWFkZAl3MCwgdzEsIHcwLCB1eHRoCisqKglyZXQK KyovCitpbnQgYmFyICh2NHNpIHgpCit7CisgIHVuc2lnbmVkIGludCBzdW0gPSB2YWRkdnFfczMy ICh4KTsKKyAgcmV0dXJuICgoKHVpbnQxNl90KShzdW0gJiAweGZmZmYpKSArICgodWludDMyX3Qp c3VtID4+IDE2KSk7Cit9CisKKy8qCisqKiBmb286CisqKiAJbHNyCXcwLCB3MCwgMTYKKyoqIAly ZXQKKyovCitzaG9ydCBmb28gKGludCB4KQoreworICByZXR1cm4geCA+PiAxNjsKK30KKworLyoK KyoqIGZvbzI6CisqKgkuLi4KKyoqIAl1bW92CXcwLCB2WzAtOF0rLmhcWzFcXQorKiogCXJldAor Ki8KK3Nob3J0IGZvbzIgKHY0c2kgeCkKK3sKKyAgaW50IHkgPSB4WzBdICsgeFsxXTsKKyAgcmV0 dXJuIHkgPj4gMTY7Cit9CmRpZmYgLS1naXQgYS9nY2MvdGVzdHN1aXRlL2djYy50YXJnZXQvYWFy Y2g2NC9zaGlmdC1yZWFkXzMuYyBiL2djYy90ZXN0c3VpdGUvZ2NjLnRhcmdldC9hYXJjaDY0L3No aWZ0LXJlYWRfMy5jCm5ldyBmaWxlIG1vZGUgMTAwNjQ0CmluZGV4IDAwMDAwMDAwMDAwMDAwMDAw MDAwMDAwMDAwMDAwMDAwMDAwMDAwMDAuLjJlYTgxZmY1YjVhZjc3OTRlMDYyZTQ3MWY0NmI0MzNl MWQ3ZDg3ZWUKLS0tIC9kZXYvbnVsbAorKysgYi9nY2MvdGVzdHN1aXRlL2djYy50YXJnZXQvYWFy Y2g2NC9zaGlmdC1yZWFkXzMuYwpAQCAtMCwwICsxLDYwIEBACisvKiB7IGRnLWRvIGNvbXBpbGUg fSAqLworLyogeyBkZy1hZGRpdGlvbmFsLW9wdGlvbnMgIi1PMiIgfSAqLworLyogeyBkZy1maW5h bCB7IGNoZWNrLWZ1bmN0aW9uLWJvZGllcyAiKioiICIiICIiIHsgdGFyZ2V0IHsgbGUgfSB9IH0g fSAqLworCisjaW5jbHVkZSA8YXJtX25lb24uaD4KKworLyoKKyoqIHVmb286CisqKgkuLi4KKyoq IAl1bW92CXcwLCB2MC5oXFsxXF0KKyoqIAlyZXQKKyovCit1aW50NjRfdCB1Zm9vICh1aW50MzJ4 NF90IHgpCit7CisgIHJldHVybiAoeFswXSArIHhbMV0pID4+IDE2OworfQorCisvKiAKKyoqIHNm b286CisqKgkuLi4KKyoqIAlzbW92CXgwLCB2MC5oXFsxXF0KKyoqIAlyZXQKKyovCitpbnQ2NF90 IHNmb28gKGludDMyeDRfdCB4KQoreworICByZXR1cm4gKHhbMF0gKyB4WzFdKSA+PiAxNjsKK30K KworLyogCisqKiBzZm9vMjoKKyoqCS4uLgorKiogCXNtb3YJdzAsIHYwLmhcWzFcXQorKiogCXJl dAorKi8KK2ludDMyX3Qgc2ZvbzIgKGludDMyeDRfdCB4KQoreworICByZXR1cm4gKHhbMF0gKyB4 WzFdKSA+PiAxNjsKK30KKworLyogCisqKiB1YmFyOgorKioJLi4uCisqKiAJdW1vdgl3MCwgdjAu YlxbM1xdCisqKiAJcmV0CisqLwordWludDY0X3QgdWJhciAodWludDMyeDRfdCB4KQoreworICBy ZXR1cm4gKHhbMF0gKyB4WzFdKSA+PiAyNDsKK30KKworLyogCisqKiBzYmFyOgorKioJLi4uCisq KiAJc21vdgl4MCwgdjAuYlxbM1xdCisqKiAJcmV0CisqLworaW50NjRfdCBzYmFyIChpbnQzMng0 X3QgeCkKK3sKKyAgcmV0dXJuICh4WzBdICsgeFsxXSkgPj4gMjQ7Cit9Cg== --_002_VI1PR08MB53254855B4410E701B78BE89FF379VI1PR08MB5325eurp_--