From: Tamar Christina <Tamar.Christina@arm.com>
To: Richard Sandiford <Richard.Sandiford@arm.com>
Cc: "jlaw@tachyum.com" <jlaw@tachyum.com>, nd <nd@arm.com>,
Richard Biener <rguenther@suse.de>,
GCC Patches <gcc-patches@gcc.gnu.org>
Subject: RE: [PATCH]middle-end cse: Make sure duplicate elements are not entered into the equivalence set [PR103404]
Date: Mon, 6 Dec 2021 09:54:42 +0000 [thread overview]
Message-ID: <VI1PR08MB5325BA2EF871F609DA89CA3FFF6D9@VI1PR08MB5325.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <VI1PR08MB5325E4F221414A1DEA034978FF699@VI1PR08MB5325.eurprd08.prod.outlook.com>
[-- Attachment #1: Type: text/plain, Size: 2377 bytes --]
Hi,
As discussed off-line this can only happen with a V1 mode, so here's a much simpler patch.
Bootstrapped Regtested on aarch64-none-linux-gnu,
x86_64-pc-linux-gnu and no regressions.
Ok for master?
Thanks,
Tamar
gcc/ChangeLog:
PR rtl-optimization/103404
* cse.c (find_sets_in_insn): Don't select elements out of a V1 mode
subreg.
gcc/testsuite/ChangeLog:
PR rtl-optimization/103404
* gcc.target/i386/pr103404.c: New test.
--- inline copy of patch ---
diff --git a/gcc/cse.c b/gcc/cse.c
index c1c7d0ca27b73c4b944b4719f95fece74e0358d5..dc5d5aed047c7776f44b159a4286390d6499c18d 100644
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -4275,7 +4275,12 @@ find_sets_in_insn (rtx_insn *insn, vec<struct set> *psets)
else if (GET_CODE (SET_SRC (x)) == CALL)
;
else if (GET_CODE (SET_SRC (x)) == CONST_VECTOR
- && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL)
+ && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL
+ /* Prevent duplicates from being generated if the type is a V1
+ type and a subreg. Folding this will result in the same
+ element as folding x itself. */
+ && !(SUBREG_P (SET_DEST (x))
+ && known_eq (GET_MODE_NUNITS (GET_MODE (SET_SRC (x))), 1)))
{
/* First register the vector itself. */
add_to_set (psets, x);
diff --git a/gcc/testsuite/gcc.target/i386/pr103404.c b/gcc/testsuite/gcc.target/i386/pr103404.c
new file mode 100644
index 0000000000000000000000000000000000000000..66f33645301db09503fc0977fd0f061a19e56ea5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr103404.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-Og -fcse-follow-jumps -fno-dce -fno-early-inlining -fgcse -fharden-conditional-branches -frerun-cse-after-loop -fno-tree-ccp -mavx5124fmaps -std=c99 -w" } */
+
+typedef unsigned __attribute__((__vector_size__ (4))) U;
+typedef unsigned __attribute__((__vector_size__ (16))) V;
+typedef unsigned __attribute__((__vector_size__ (64))) W;
+
+int x, y;
+
+V v;
+W w;
+
+inline
+int bar (U a)
+{
+ a |= x;
+ W k =
+ __builtin_shufflevector (v, 5 / a,
+ 2, 4, 0, 2, 4, 1, 0, 1,
+ 1, 2, 1, 3, 0, 4, 4, 0);
+ w = k;
+ y = 0;
+}
+
+int
+foo ()
+{
+ bar ((U){0xffffffff});
+ for (unsigned i; i < sizeof (foo);)
+ ;
+}
+
[-- Attachment #2: rb15109.patch --]
[-- Type: application/octet-stream, Size: 1826 bytes --]
diff --git a/gcc/cse.c b/gcc/cse.c
index c1c7d0ca27b73c4b944b4719f95fece74e0358d5..dc5d5aed047c7776f44b159a4286390d6499c18d 100644
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -4275,7 +4275,12 @@ find_sets_in_insn (rtx_insn *insn, vec<struct set> *psets)
else if (GET_CODE (SET_SRC (x)) == CALL)
;
else if (GET_CODE (SET_SRC (x)) == CONST_VECTOR
- && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL)
+ && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL
+ /* Prevent duplicates from being generated if the type is a V1
+ type and a subreg. Folding this will result in the same
+ element as folding x itself. */
+ && !(SUBREG_P (SET_DEST (x))
+ && known_eq (GET_MODE_NUNITS (GET_MODE (SET_SRC (x))), 1)))
{
/* First register the vector itself. */
add_to_set (psets, x);
diff --git a/gcc/testsuite/gcc.target/i386/pr103404.c b/gcc/testsuite/gcc.target/i386/pr103404.c
new file mode 100644
index 0000000000000000000000000000000000000000..66f33645301db09503fc0977fd0f061a19e56ea5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr103404.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-Og -fcse-follow-jumps -fno-dce -fno-early-inlining -fgcse -fharden-conditional-branches -frerun-cse-after-loop -fno-tree-ccp -mavx5124fmaps -std=c99 -w" } */
+
+typedef unsigned __attribute__((__vector_size__ (4))) U;
+typedef unsigned __attribute__((__vector_size__ (16))) V;
+typedef unsigned __attribute__((__vector_size__ (64))) W;
+
+int x, y;
+
+V v;
+W w;
+
+inline
+int bar (U a)
+{
+ a |= x;
+ W k =
+ __builtin_shufflevector (v, 5 / a,
+ 2, 4, 0, 2, 4, 1, 0, 1,
+ 1, 2, 1, 3, 0, 4, 4, 0);
+ w = k;
+ y = 0;
+}
+
+int
+foo ()
+{
+ bar ((U){0xffffffff});
+ for (unsigned i; i < sizeof (foo);)
+ ;
+}
+
next prev parent reply other threads:[~2021-12-06 9:54 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-29 7:40 Tamar Christina
2021-11-29 9:01 ` Richard Biener
2021-11-29 9:16 ` Tamar Christina
2021-12-02 14:12 ` Tamar Christina
2021-12-06 9:54 ` Tamar Christina [this message]
2021-12-06 10:10 ` Richard Sandiford
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