Re: [PATCH] i386: Emit 16b atomics inline with -m64 -mcx16 -mavx [PR104688]

[Jakub Jelinek <jakub@redhat.com>]

On Mon, Nov 14, 2022 at 05:04:24PM +0800, Hongtao Liu wrote:
> On Mon, Nov 14, 2022 at 3:57 PM Uros Bizjak via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
> >
> > On Mon, Nov 14, 2022 at 8:52 AM Jakub Jelinek <jakub@redhat.com> wrote:
> > >
> > > Hi!
> > >
> > > Working virtually out of Baker Island.
> > >
> > > Given
> > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688#c10
> > > the following patch implements atomic load/store (and therefore also
> > > enabling compare and exchange) for -m64 -mcx16 -mavx.
> > >
> > > Ok for trunk if it passes bootstrap/regtest?
> >
> > We only have guarantee from Intel and AMD, there can be other vendors.
> Can we make it a as a micro-architecture tuning?

No, -mtune= isn't a guarantee the code will be executed only on certain CPUs
(-march= is), -mtune= is only about optimizing code for certain CPU.
If we don't get a guarantee from the remaining makers of CPUs with AVX +
CX16 ISAs, another option would be to add a new -mvmovdqa-atomic option
and set it on for -march= of Intel and AMD CPUs with AVX + CX16
and use
TARGET_64BIT && TARGET_CMPXCHG16B && TARGET_AVX && TARGET_VMOVDQA_ATOMIC
as the conditions in the patch.
But that would use it only for -march=native or when people -march=
a particular Intel or AMD CPU, while if we get a guarantee from all AVX+CX16
CPU makers, then it can be on by default with just -mcx16 -mavx.

	Jakub