From: Jakub Jelinek <jakub@redhat.com>
To: gcc-patches@gcc.gnu.org, Florian Weimer <fweimer@redhat.com>,
Andre Vieira <andre.simoesdiasvieira@arm.com>,
Andrew Pinski <pinskia@gmail.com>,
Jeff Law <jeffreyalaw@gmail.com>,
richard.sandiford@arm.com
Subject: Re: [PATCH] Various fixes for DWARF register size computation
Date: Thu, 12 Jan 2023 18:07:37 +0100 [thread overview]
Message-ID: <Y8A+WcVRzABfFzxU@tucnak> (raw)
In-Reply-To: <mptsfgfu280.fsf@arm.com>
[-- Attachment #1: Type: text/plain, Size: 1095 bytes --]
On Thu, Jan 12, 2023 at 04:50:07PM +0000, Richard Sandiford wrote:
> I'm jumping in here without fully understanding the context, so maybe this
> is exactly your point, but: the SIMD/FP DWARF registers are supposed to be
> size 8 regardless of which features are enabled. That's already only half
> of the hardware register size for base Armv8-A, since Advanced SIMD registers
> are 16 bytes in size.
>
> So yeah, if we're using the hardware register size then something is wrong.
I'm talking about what the following compiles to
static unsigned char dwarf_reg_size_table[__LIBGCC_DWARF_FRAME_REGISTERS__+1];
void
foo (void)
{
__builtin_init_dwarf_reg_size_table (dwarf_reg_size_table);
}
(and therefore what libgcc/unwind-dw2.c (init_dwarf_reg_size_table) as well)
with -O2 -fbuilding-libgcc -march=armv8-a vs. -O2 -fbuilding-libgcc -march=armv8-a+sve
The former is setting I think [0..31, 46, 48..63, 72..79, 96]=8, [64..71, 80..95]=0
(and leaving others untouched, which keeps them 0).
While the latter is setting [0..31, 46, 72..79, 96]=8, [64..71, 80..95]=0
and [48..63]=cntd
Jakub
[-- Attachment #2: 8.s1 --]
[-- Type: text/plain, Size: 2365 bytes --]
.arch armv8-a
.file "8.c"
.text
.align 2
.align 4
.global foo
.type foo, %function
foo:
.LFB0:
adrp x2, .LANCHOR0
add x0, x2, :lo12:.LANCHOR0
mov w1, 8
strb w1, [x2, #:lo12:.LANCHOR0]
strb w1, [x0, 1]
strb w1, [x0, 2]
strb w1, [x0, 3]
strb w1, [x0, 4]
strb w1, [x0, 5]
strb w1, [x0, 6]
strb w1, [x0, 7]
strb w1, [x0, 8]
strb w1, [x0, 9]
strb w1, [x0, 10]
strb w1, [x0, 11]
strb w1, [x0, 12]
strb w1, [x0, 13]
strb w1, [x0, 14]
strb w1, [x0, 15]
strb w1, [x0, 16]
strb w1, [x0, 17]
strb w1, [x0, 18]
strb w1, [x0, 19]
strb w1, [x0, 20]
strb w1, [x0, 21]
strb w1, [x0, 22]
strb w1, [x0, 23]
strb w1, [x0, 24]
strb w1, [x0, 25]
strb w1, [x0, 26]
strb w1, [x0, 27]
strb w1, [x0, 28]
strb w1, [x0, 29]
strb w1, [x0, 30]
strb w1, [x0, 31]
strb wzr, [x0, 64]
strb w1, [x0, 46]
strb wzr, [x0, 65]
strb wzr, [x0, 66]
strb wzr, [x0, 67]
strb wzr, [x0, 68]
strb wzr, [x0, 69]
strb wzr, [x0, 70]
strb wzr, [x0, 71]
strb w1, [x0, 72]
strb w1, [x0, 73]
strb w1, [x0, 74]
strb w1, [x0, 75]
strb w1, [x0, 76]
strb w1, [x0, 77]
strb w1, [x0, 78]
strb w1, [x0, 79]
strb wzr, [x0, 80]
strb wzr, [x0, 81]
strb wzr, [x0, 82]
strb wzr, [x0, 83]
strb wzr, [x0, 84]
strb wzr, [x0, 85]
strb wzr, [x0, 86]
strb wzr, [x0, 87]
strb wzr, [x0, 88]
strb wzr, [x0, 89]
strb wzr, [x0, 90]
strb wzr, [x0, 91]
strb wzr, [x0, 92]
strb wzr, [x0, 93]
strb wzr, [x0, 94]
strb wzr, [x0, 95]
strb w1, [x0, 48]
strb w1, [x0, 49]
strb w1, [x0, 50]
strb w1, [x0, 51]
strb w1, [x0, 52]
strb w1, [x0, 53]
strb w1, [x0, 54]
strb w1, [x0, 55]
strb w1, [x0, 56]
strb w1, [x0, 57]
strb w1, [x0, 58]
strb w1, [x0, 59]
strb w1, [x0, 60]
strb w1, [x0, 61]
strb w1, [x0, 62]
strb w1, [x0, 63]
strb w1, [x0, 96]
ret
.LFE0:
.size foo, .-foo
.bss
.align 4
.set .LANCHOR0,. + 0
.type dwarf_reg_size_table, %object
.size dwarf_reg_size_table, 98
dwarf_reg_size_table:
.zero 98
.section .eh_frame,"aw",@progbits
.Lframe1:
.4byte .LECIE1-.LSCIE1
.LSCIE1:
.4byte 0
.byte 0x3
.string "zR"
.byte 0x1
.byte 0x78
.byte 0x1e
.byte 0x1
.byte 0x1b
.byte 0xc
.byte 0x1f
.byte 0
.align 3
.LECIE1:
.LSFDE1:
.4byte .LEFDE1-.LASFDE1
.LASFDE1:
.4byte .LASFDE1-.Lframe1
.4byte .LFB0-.
.4byte .LFE0-.LFB0
.byte 0
.align 3
.LEFDE1:
.ident "GCC: (GNU) 13.0.0 20230111 (experimental)"
.section .note.GNU-stack,"",@progbits
[-- Attachment #3: 8.s2 --]
[-- Type: text/plain, Size: 2378 bytes --]
.arch armv8-a+sve
.file "8.c"
.text
.align 2
.align 4
.global foo
.type foo, %function
foo:
.LFB0:
adrp x3, .LANCHOR0
add x0, x3, :lo12:.LANCHOR0
mov w1, 8
cntd x2
strb w1, [x3, #:lo12:.LANCHOR0]
strb w1, [x0, 1]
strb w1, [x0, 2]
strb w1, [x0, 3]
strb w1, [x0, 4]
strb w1, [x0, 5]
strb w1, [x0, 6]
strb w1, [x0, 7]
strb w1, [x0, 8]
strb w1, [x0, 9]
strb w1, [x0, 10]
strb w1, [x0, 11]
strb w1, [x0, 12]
strb w1, [x0, 13]
strb w1, [x0, 14]
strb w1, [x0, 15]
strb w1, [x0, 16]
strb w1, [x0, 17]
strb w1, [x0, 18]
strb w1, [x0, 19]
strb w1, [x0, 20]
strb w1, [x0, 21]
strb w1, [x0, 22]
strb w1, [x0, 23]
strb w1, [x0, 24]
strb w1, [x0, 25]
strb w1, [x0, 26]
strb w1, [x0, 27]
strb w1, [x0, 28]
strb w1, [x0, 29]
strb w1, [x0, 30]
strb w1, [x0, 31]
strb wzr, [x0, 64]
strb w1, [x0, 46]
strb wzr, [x0, 65]
strb wzr, [x0, 66]
strb wzr, [x0, 67]
strb wzr, [x0, 68]
strb wzr, [x0, 69]
strb wzr, [x0, 70]
strb wzr, [x0, 71]
strb w1, [x0, 72]
strb w1, [x0, 73]
strb w1, [x0, 74]
strb w1, [x0, 75]
strb w1, [x0, 76]
strb w1, [x0, 77]
strb w1, [x0, 78]
strb w1, [x0, 79]
strb wzr, [x0, 80]
strb wzr, [x0, 81]
strb wzr, [x0, 82]
strb wzr, [x0, 83]
strb wzr, [x0, 84]
strb wzr, [x0, 85]
strb wzr, [x0, 86]
strb wzr, [x0, 87]
strb wzr, [x0, 88]
strb wzr, [x0, 89]
strb wzr, [x0, 90]
strb wzr, [x0, 91]
strb wzr, [x0, 92]
strb wzr, [x0, 93]
strb wzr, [x0, 94]
strb wzr, [x0, 95]
strb w2, [x0, 48]
strb w2, [x0, 49]
strb w2, [x0, 50]
strb w2, [x0, 51]
strb w2, [x0, 52]
strb w2, [x0, 53]
strb w2, [x0, 54]
strb w2, [x0, 55]
strb w2, [x0, 56]
strb w2, [x0, 57]
strb w2, [x0, 58]
strb w2, [x0, 59]
strb w2, [x0, 60]
strb w2, [x0, 61]
strb w2, [x0, 62]
strb w2, [x0, 63]
strb w1, [x0, 96]
ret
.LFE0:
.size foo, .-foo
.bss
.align 3
.set .LANCHOR0,. + 0
.type dwarf_reg_size_table, %object
.size dwarf_reg_size_table, 98
dwarf_reg_size_table:
.zero 98
.section .eh_frame,"aw",@progbits
.Lframe1:
.4byte .LECIE1-.LSCIE1
.LSCIE1:
.4byte 0
.byte 0x3
.string "zR"
.byte 0x1
.byte 0x78
.byte 0x1e
.byte 0x1
.byte 0x1b
.byte 0xc
.byte 0x1f
.byte 0
.align 3
.LECIE1:
.LSFDE1:
.4byte .LEFDE1-.LASFDE1
.LASFDE1:
.4byte .LASFDE1-.Lframe1
.4byte .LFB0-.
.4byte .LFE0-.LFB0
.byte 0
.align 3
.LEFDE1:
.ident "GCC: (GNU) 13.0.0 20230111 (experimental)"
.section .note.GNU-stack,"",@progbits
next prev parent reply other threads:[~2023-01-12 17:07 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-03 11:15 Florian Weimer
2023-01-03 12:05 ` Jakub Jelinek
2023-01-03 13:25 ` Florian Weimer
2023-01-03 13:54 ` Jakub Jelinek
2023-01-12 16:50 ` Richard Sandiford
2023-01-12 17:07 ` Jakub Jelinek [this message]
2023-01-12 21:03 ` Richard Sandiford
2023-01-13 10:05 ` [pushed] aarch64: Fix DWARF frame register sizes for predicates Richard Sandiford
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