From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 73C6C3858C52 for ; Thu, 2 Feb 2023 17:38:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 73C6C3858C52 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0187473.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 312HK57M029084; Thu, 2 Feb 2023 17:38:36 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=date : from : to : subject : message-id : mime-version : content-type; s=pp1; bh=UlcTGjlCrhbU9i5mPkcDLwJXrJCYpamXMX1SlytV73A=; b=evmgjlfRZ+sNSyHKBYCu0jQ35PO90sGkPZuaM+R1wdHRsIjY6TxMS/nNCZ6zmZtIo2ga xEitaASN54k4toEzioCDOEpO/s3VEQt5PobdbzH2i07Fj/Sk7pHgwY6t1hdyl3Gogick nN7bJoajA+I+pjIn56Yzj7RF8H6jtkXnmok+hBPM+Pz2dE05Y9uoOwrXwfdacsEn+JLp iAVyemXKC/DIGVnrb7QAcr1DYoerAE5tW2px/KXtH/LLMqGKp+8SQan7s/nLIrCljd7Q rN61k8JBvjYVZzj6kvlFaItYMKl2rsr2BNU4kokPZxdOgvAd7DS02O+bRgG1dKOMIV3x dA== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3nghg0rc7y-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 02 Feb 2023 17:38:35 +0000 Received: from m0187473.ppops.net (m0187473.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 312HTR8x019255; Thu, 2 Feb 2023 17:38:35 GMT Received: from ppma02dal.us.ibm.com (a.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.10]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3nghg0rc7e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 02 Feb 2023 17:38:35 +0000 Received: from pps.filterd (ppma02dal.us.ibm.com [127.0.0.1]) by ppma02dal.us.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 312FTKhd019328; Thu, 2 Feb 2023 17:38:34 GMT Received: from smtprelay01.wdc07v.mail.ibm.com ([9.208.129.119]) by ppma02dal.us.ibm.com (PPS) with ESMTPS id 3ncvur3re0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 02 Feb 2023 17:38:34 +0000 Received: from smtpav04.dal12v.mail.ibm.com (smtpav04.dal12v.mail.ibm.com [10.241.53.103]) by smtprelay01.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 312HcW7Z35062036 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 2 Feb 2023 17:38:32 GMT Received: from smtpav04.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 558FA58052; Thu, 2 Feb 2023 17:38:32 +0000 (GMT) Received: from smtpav04.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C82E95804E; Thu, 2 Feb 2023 17:38:31 +0000 (GMT) Received: from toto.the-meissners.org (unknown [9.65.233.34]) by smtpav04.dal12v.mail.ibm.com (Postfix) with ESMTPS; Thu, 2 Feb 2023 17:38:31 +0000 (GMT) Date: Thu, 2 Feb 2023 12:38:30 -0500 From: Michael Meissner To: gcc-patches@gcc.gnu.org, Michael Meissner , Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt Subject: [PATCH] Bump up precision size to 16 bits. Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: Xm67nvqLmK_qRJhPfDJ7-GG7grfxRXYq X-Proofpoint-GUID: hTp5ytm7SkoabnPrc4hKvyoIH0gd4a24 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-02_12,2023-02-02_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 phishscore=0 mlxlogscore=999 lowpriorityscore=0 bulkscore=0 spamscore=0 impostorscore=0 adultscore=0 priorityscore=1501 mlxscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302020152 X-Spam-Status: No, score=-9.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_MANYTO,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: The new __dmr type that is being added as a possible future PowerPC instruction set bumps into a structure field size issue. The size of the __dmr type is 1024 bits. The precision field in tree_type_common is currently 10 bits, so if you store 1,024 into field, you get a 0 back. When you get 0 in the precision field, the ccp pass passes this 0 to sext_hwi in hwint.h. That function in turn generates a shift that is equal to the host wide int bit size, which is undefined as machine dependent for shifting in C/C++. int shift = HOST_BITS_PER_WIDE_INT - prec; return ((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) src << shift)) >> shift; It turns out the x86_64 where I first did my tests returns the original input before the two shifts, while the PowerPC always returns 0. In the ccp pass, the original input is -1, and so it worked. When I did the runs on the PowerPC, the result was 0, which ultimately led to the failure. In addition, once the precision field is larger, it will help PR C/102989 (C2x _BigInt) as well as the implementation of the SET_TYPE_VECTOR_SUBPARTS macro. I bootstraped various PowerPC compilers (power10 LE, power9 LE, power8 BE) along with an x86_64 build. There were no regressions. My proposed patches for the __dmr type now run fine. Can I install this into the master branch for GCC 13? 2023-02-02 Richard Biener Michael Meissner gcc/ PR middle-end/108623 * hwint.h (sext_hwi): Add assertion against precision 0. * tree-core.h (tree_type_common): Bump up precision field to 16 bits. Align bit fields > 1 bit to at least an 8-bit boundary. --- gcc/hwint.h | 1 + gcc/tree-core.h | 24 ++++++++++++------------ 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/gcc/hwint.h b/gcc/hwint.h index e31aa006fa4..ba92efbfc25 100644 --- a/gcc/hwint.h +++ b/gcc/hwint.h @@ -277,6 +277,7 @@ ctz_or_zero (unsigned HOST_WIDE_INT x) static inline HOST_WIDE_INT sext_hwi (HOST_WIDE_INT src, unsigned int prec) { + gcc_checking_assert (prec != 0); if (prec == HOST_BITS_PER_WIDE_INT) return src; else diff --git a/gcc/tree-core.h b/gcc/tree-core.h index 8124a1328d4..b71748c6c02 100644 --- a/gcc/tree-core.h +++ b/gcc/tree-core.h @@ -1686,18 +1686,8 @@ struct GTY(()) tree_type_common { tree attributes; unsigned int uid; - unsigned int precision : 10; - unsigned no_force_blk_flag : 1; - unsigned needs_constructing_flag : 1; - unsigned transparent_aggr_flag : 1; - unsigned restrict_flag : 1; - unsigned contains_placeholder_bits : 2; - + unsigned int precision : 16; ENUM_BITFIELD(machine_mode) mode : 8; - - /* TYPE_STRING_FLAG for INTEGER_TYPE and ARRAY_TYPE. - TYPE_CXX_ODR_P for RECORD_TYPE and UNION_TYPE. */ - unsigned string_flag : 1; unsigned lang_flag_0 : 1; unsigned lang_flag_1 : 1; unsigned lang_flag_2 : 1; @@ -1713,12 +1703,22 @@ struct GTY(()) tree_type_common { so we need to store the value 32 (not 31, as we need the zero as well), hence six bits. */ unsigned align : 6; + /* TYPE_STRING_FLAG for INTEGER_TYPE and ARRAY_TYPE. + TYPE_CXX_ODR_P for RECORD_TYPE and UNION_TYPE. */ + unsigned string_flag : 1; + unsigned no_force_blk_flag : 1; + unsigned warn_if_not_align : 6; + unsigned needs_constructing_flag : 1; + unsigned transparent_aggr_flag : 1; + + unsigned contains_placeholder_bits : 2; + unsigned restrict_flag : 1; unsigned typeless_storage : 1; unsigned empty_flag : 1; unsigned indivisible_p : 1; unsigned no_named_args_stdarg_p : 1; - unsigned spare : 15; + unsigned spare : 9; alias_set_type alias_set; tree pointer_to; -- 2.39.1 -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meissner@linux.ibm.com