From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 96FFB3858C5E for ; Fri, 3 Feb 2023 05:49:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 96FFB3858C5E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3135mUs1004627; Fri, 3 Feb 2023 05:49:17 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=date : from : to : subject : message-id : references : content-type : in-reply-to : mime-version; s=pp1; bh=MUpYTsGVOI7hbTPk9pQfvey6LqR5HcHUXJHGeWeS6Zs=; b=EKNN/dpWx+CMdc7z50ivjS+duKDDDbcBZxSvZCGyybq5mgotQiebrKRiEJP9HRiSpbbv 9k8xjVDRVHQvx3LNCmVznzQnNELUikRevyU5xsxZNwjcgXe5QhZpo38KO8GoNEFNJzMr prq41P5UVoQVbYMiLCN7VKib6QDxsFQqC770qNoSQdN6fj8MfL4VWpEllEPU3t0iNzBQ W1ho/e51CrbXt966oLVgOw+PBVT/8gQIonqHbMNQb0IbsypyMwKX2FqAe61NeNNvUPbQ 5r8MW9P74R/nqZ/xcTIIG+opRiw1Io/tFLuI9D6XXlvyWOCrqrHndCNrEan82JfeQ1P0 Bw== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3ngveu00ca-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 03 Feb 2023 05:49:16 +0000 Received: from m0127361.ppops.net (m0127361.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3135n2Gd006479; Fri, 3 Feb 2023 05:49:16 GMT Received: from ppma04wdc.us.ibm.com (1a.90.2fa9.ip4.static.sl-reverse.com [169.47.144.26]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3ngveu00c6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 03 Feb 2023 05:49:16 +0000 Received: from pps.filterd (ppma04wdc.us.ibm.com [127.0.0.1]) by ppma04wdc.us.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 31344CLJ028721; Fri, 3 Feb 2023 05:49:15 GMT Received: from smtprelay03.dal12v.mail.ibm.com ([9.208.130.98]) by ppma04wdc.us.ibm.com (PPS) with ESMTPS id 3ncvuyy6mk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 03 Feb 2023 05:49:15 +0000 Received: from smtpav05.dal12v.mail.ibm.com (smtpav05.dal12v.mail.ibm.com [10.241.53.104]) by smtprelay03.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 3135nEq213238792 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 3 Feb 2023 05:49:14 GMT Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AE10858067; Fri, 3 Feb 2023 05:49:14 +0000 (GMT) Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2224558056; Fri, 3 Feb 2023 05:49:14 +0000 (GMT) Received: from toto.the-meissners.org (unknown [9.65.233.34]) by smtpav05.dal12v.mail.ibm.com (Postfix) with ESMTPS; Fri, 3 Feb 2023 05:49:14 +0000 (GMT) Date: Fri, 3 Feb 2023 00:49:12 -0500 From: Michael Meissner To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt Subject: [PATCH 1/2] PR target/107299: Fix build issue when long double is IEEE 128-bit Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt References: Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-GUID: e5GEwOBVS76eWinL3Vq4GT-Tj6q9iVAv X-Proofpoint-ORIG-GUID: Unvor-5dkmGUCtjuT0hBdNCObXHdAWbT X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-03_02,2023-02-02_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 lowpriorityscore=0 adultscore=0 mlxlogscore=993 spamscore=0 suspectscore=0 malwarescore=0 clxscore=1015 bulkscore=0 impostorscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302030050 X-Spam-Status: No, score=-10.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_MANYTO,KAM_SHORT,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch is a repost of a patch: | Date: Thu, 19 Jan 2023 11:37:27 -0500 | Subject: [PATCH] PR target/107299: Fix build issue when long double is IEEE 128-bit | Message-ID: This patch updates the IEEE 128-bit types used in libgcc. At the moment, we cannot build GCC when the target uses IEEE 128-bit long doubles, such as building the compiler for a native Fedora 36 system. The build dies when it is trying to build the _mulkc3.c and _divkc3 modules. This patch changes libgcc to use long double for the IEEE 128-bit base type if long double is IEEE 128-bit, and it uses _Float128 otherwise. The built-in functions are adjusted to be the correct version based on the IEEE 128-bit base type used. While it is desirable to ultimately have __float128 and _Float128 use the same internal type and mode within GCC, at present if you use the option -mabi=ieeelongdouble, the __float128 type will use the long double type and not the _Float128 type. We get an internal compiler error if we combine the signbitf128 built-in with a long double type. I've gone through several iterations of trying to fix this within GCC, and there are various problems that have come up. I developed this alternative patch that changes libgcc so that it does not tickle the issue. I hope we can fix the compiler at some point, but right now, this is preventing people on Fedora 36 systems from building compilers where the default long double is IEEE 128-bit. I have built a GCC compiler tool chain on the following platforms and there were no regressions caused by these patches. * Power10 little endian, IBM long double, --with-cpu=power10 * Power9 little endian, IBM long double, --with-cpu=power9 * Power8 big endian, IBM long double, --with-cpu=power8, both 32-bit/64-bit tests. In addition, I have built a GCC compiler tool chain on the following systems with IEEE 128-bit long double as the default. Comparing the test suite runs to the runs for the toolchain with IBM long double as the default, I only get the expected differences (C++ modules test fail on IEEE long double, 3 Fortran tests pass on IEEE long double that fail on IBM long double, C test pr105334.c fails, and C test fp128_conversions.c fails on power10): * Power10 little endian, IEEE long double, --with-cpu=power10 * Power9 little endian, IEEE long double, --with-cpu=power9 Note, it is Friday February 3rd, and I will be on vacation from Tuesday February 7th through Tuesday February 14th. Can I check this change into the master branch? 2023-02-02 Michael Meissner PR target/107299 * config/rs6000/_divkc3.c (COPYSIGN): Use the correct built-in based on whether long double is IBM or IEEE. (INFINITY): Likewise. (FABS): Likewise. * config/rs6000/_mulkc3.c (COPYSIGN): Likewise. (INFINITY): Likewise. * config/rs6000/quad-float128.h (TF): Remove definition. (TFtype): Define to be long double or _Float128. (TCtype): Define to be _Complex long double or _Complex _Float128. * libgcc2.h (TFtype): Allow machine config files to override this. (TCtype): Likewise. * soft-fp/quad.h (TFtype): Likewise. --- libgcc/config/rs6000/_divkc3.c | 8 ++++++++ libgcc/config/rs6000/_mulkc3.c | 7 +++++++ libgcc/config/rs6000/quad-float128.h | 19 ++++++------------- libgcc/libgcc2.h | 4 ++++ libgcc/soft-fp/quad.h | 2 ++ 5 files changed, 27 insertions(+), 13 deletions(-) diff --git a/libgcc/config/rs6000/_divkc3.c b/libgcc/config/rs6000/_divkc3.c index 9f52428cfa0..e3bb97c9cb7 100644 --- a/libgcc/config/rs6000/_divkc3.c +++ b/libgcc/config/rs6000/_divkc3.c @@ -26,9 +26,17 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #include "soft-fp.h" #include "quad-float128.h" +#ifndef __LONG_DOUBLE_IEEE128__ #define COPYSIGN(x,y) __builtin_copysignf128 (x, y) #define INFINITY __builtin_inff128 () #define FABS __builtin_fabsf128 + +#else +#define COPYSIGN(x,y) __builtin_copysignl (x, y) +#define INFINITY __builtin_infl () +#define FABS __builtin_fabsl +#endif + #define isnan __builtin_isnan #define isinf __builtin_isinf #define isfinite __builtin_isfinite diff --git a/libgcc/config/rs6000/_mulkc3.c b/libgcc/config/rs6000/_mulkc3.c index 299d8d147b0..3d98436d1d4 100644 --- a/libgcc/config/rs6000/_mulkc3.c +++ b/libgcc/config/rs6000/_mulkc3.c @@ -26,8 +26,15 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #include "soft-fp.h" #include "quad-float128.h" +#ifndef __LONG_DOUBLE_IEEE128__ #define COPYSIGN(x,y) __builtin_copysignf128 (x, y) #define INFINITY __builtin_inff128 () + +#else +#define COPYSIGN(x,y) __builtin_copysignl (x, y) +#define INFINITY __builtin_infl () +#endif + #define isnan __builtin_isnan #define isinf __builtin_isinf diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h index 68bd9b97f23..3354110004c 100644 --- a/libgcc/config/rs6000/quad-float128.h +++ b/libgcc/config/rs6000/quad-float128.h @@ -27,21 +27,14 @@ License along with the GNU C Library; if not, see . */ -/* quad.h defines the TFtype type by: - typedef float TFtype __attribute__ ((mode (TF))); - - This define forces it to use KFmode (aka, ieee 128-bit floating point). - However, when the compiler's default is changed so that long double is IEEE - 128-bit floating point, we need to go back to using TFmode and TCmode. */ -#ifndef __LONG_DOUBLE_IEEE128__ -#define TF KF - -/* We also need TCtype to represent complex ieee 128-bit float for - __mulkc3 and __divkc3. */ -typedef __complex float TCtype __attribute__ ((mode (KC))); +/* Override the types for IEEE 128-bit scalar and complex. */ +#ifdef __LONG_DOUBLE_IEEE128__ +#define TFtype long double +#define TCtype _Complex long double #else -typedef __complex float TCtype __attribute__ ((mode (TC))); +#define TFtype _Float128 +#define TCtype _Complex _Float128 #endif /* Force the use of the VSX instruction set. */ diff --git a/libgcc/libgcc2.h b/libgcc/libgcc2.h index 6f42db7f0be..3ec9bbd8164 100644 --- a/libgcc/libgcc2.h +++ b/libgcc/libgcc2.h @@ -156,9 +156,13 @@ typedef float XFtype __attribute__ ((mode (XF))); typedef _Complex float XCtype __attribute__ ((mode (XC))); #endif #if LIBGCC2_HAS_TF_MODE +#ifndef TFtype typedef float TFtype __attribute__ ((mode (TF))); +#endif +#ifndef TCtype typedef _Complex float TCtype __attribute__ ((mode (TC))); #endif +#endif typedef int cmp_return_type __attribute__((mode (__libgcc_cmp_return__))); typedef int shift_count_type __attribute__((mode (__libgcc_shift_count__))); diff --git a/libgcc/soft-fp/quad.h b/libgcc/soft-fp/quad.h index 3889bb44f1f..71f87d36ba9 100644 --- a/libgcc/soft-fp/quad.h +++ b/libgcc/soft-fp/quad.h @@ -65,7 +65,9 @@ #define _FP_HIGHBIT_DW_Q \ ((_FP_W_TYPE) 1 << (_FP_WFRACBITS_DW_Q - 1) % _FP_W_TYPE_SIZE) +#ifndef TFtype typedef float TFtype __attribute__ ((mode (TF))); +#endif #if _FP_W_TYPE_SIZE < 64 -- 2.39.1 -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meissner@linux.ibm.com