From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 498EC3858415 for ; Tue, 7 Sep 2021 07:12:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 498EC3858415 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 18774CxH104445; Tue, 7 Sep 2021 03:12:42 -0400 Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 3awsmesput-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 07 Sep 2021 03:12:41 -0400 Received: from m0098399.ppops.net (m0098399.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.43/8.16.0.43) with SMTP id 18775rrf112937; Tue, 7 Sep 2021 03:12:41 -0400 Received: from ppma03wdc.us.ibm.com (ba.79.3fa9.ip4.static.sl-reverse.com [169.63.121.186]) by mx0a-001b2d01.pphosted.com with ESMTP id 3awsmespue-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 07 Sep 2021 03:12:41 -0400 Received: from pps.filterd (ppma03wdc.us.ibm.com [127.0.0.1]) by ppma03wdc.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 1877C2kk016121; Tue, 7 Sep 2021 07:12:40 GMT Received: from b03cxnp08025.gho.boulder.ibm.com (b03cxnp08025.gho.boulder.ibm.com [9.17.130.17]) by ppma03wdc.us.ibm.com with ESMTP id 3av0e9xe8v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 07 Sep 2021 07:12:40 +0000 Received: from b03ledav001.gho.boulder.ibm.com (b03ledav001.gho.boulder.ibm.com [9.17.130.232]) by b03cxnp08025.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 1877Ccec42729922 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 7 Sep 2021 07:12:38 GMT Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BB3B66E060; Tue, 7 Sep 2021 07:12:38 +0000 (GMT) Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 091B46E052; Tue, 7 Sep 2021 07:12:37 +0000 (GMT) Received: from toto.the-meissners.org (unknown [9.160.139.21]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTPS; Tue, 7 Sep 2021 07:12:37 +0000 (GMT) Date: Tue, 7 Sep 2021 03:12:36 -0400 From: Michael Meissner To: gcc-patches@gcc.gnu.org, Michael Meissner , Segher Boessenkool , David Edelsohn , Bill Schmidt , Peter Bergner , Will Schmidt Subject: [PATCH] Fix SFmode subreg of DImode and TImode Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn , Bill Schmidt , Peter Bergner , Will Schmidt MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-TM-AS-GCONF: 00 X-Proofpoint-GUID: MWb8fMtyPzlHT8Lg1z_Z8ZbXE2-EnoQ3 X-Proofpoint-ORIG-GUID: IVpV7YrXTz9AMA7ldb25UWDpmJtKUTS8 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-09-07_02:2021-09-03, 2021-09-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 mlxlogscore=999 suspectscore=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 adultscore=0 clxscore=1015 spamscore=0 priorityscore=1501 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2108310000 definitions=main-2109070047 X-Spam-Status: No, score=-10.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_MANYTO, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Sep 2021 07:12:44 -0000 [PATCH] Fix SFmode subreg of DImode and TImode This patch fixes the breakage in the PowerPC due to a recent change in SUBREG behavior. While it is arguable that the patch that caused the breakage should be reverted, this patch should be a bandage to prevent these changes from happening again. I first noticed it in building the Spec 2017 wrf_r and blender_r benchmarks. Once I applied this patch, I also noticed several of the tests now pass. The core of the problem is we need to treat SUBREG's of SFmode and SImode specially on the PowerPC. This is due to the fact that SFmode values that are in the vector and floating point registers are represented as DFmode. When we want to do a direct move between the GPR registers and the vector registers, we have to convert the value from the DFmode representation to/from the SFmode representation. By doing this special processing instead of doing the transfer via store and load, we were able to speed up the math library which at times want to use the SFmode values in a union, and do logical operations on it (to test exponent ranges, etc.) and then move it over to use as a floating point value. I did a bootstrap build on a little endian power9 system with and without the patch applied. There was no regression in the tests. I'm doing a build on a big endian power8 system, but it hasn't finished yet as I sent this email. I will check on the big endian progress tomorrow morning. The following tests now pass once again with the test. C tests: ======== gcc.c-torture/compile/20071102-1.c gcc.c-torture/compile/pr55921.c gcc.c-torture/compile/pr85945.c gcc.c-torture/execute/complex-3.c gcc.dg/atomic/c11-atomic-exec-1.c gcc.dg/atomic/c11-atomic-exec-2.c gcc.dg/atomic/c11-atomic-exec-4.c gcc.dg/atomic/c11-atomic-exec-5.c gcc.dg/c11-atomic-2.c gcc.dg/pr42475.c gcc.dg/pr47201.c gcc.dg/pr48335-1.c gcc.dg/torture/pr67741.c gcc.dg/tree-ssa/ssa-dom-thread-10.c gcc.dg/tsan/pr88030.c gcc.dg/ubsan/float-cast-overflow-atomic.c gcc.dg/vect/no-tree-sra-bb-slp-pr50730.c C++ tests: ========== g++.dg/opt/alias1.C g++.dg/template/koenig6.C g++.dg/torture/pr40924.C tmpdir-g++.dg-struct-layout-1/t001 Fortran tests: ============== gfortran.dg/array_constructor_type_22.f03 gfortran.dg/array_function_6.f90 gfortran.dg/derived_comp_array_ref_7.f90 gfortran.dg/elemental_scalar_args_1.f90 gfortran.dg/elemental_subroutine_1.f90 gfortran.dg/inline_matmul_5.f90 gfortran.dg/inline_matmul_8.f90 gfortran.dg/inline_matmul_9.f90 gfortran.dg/matmul_bounds_6.f90 gfortran.dg/operator_1.f90 gfortran.dg/past_eor.f90 gfortran.dg/pr101121.f gfortran.dg/pr91552.f90 gfortran.dg/spread_shape_1.f90 gfortran.dg/typebound_operator_3.f03 gfortran.dg/value_1.f90 gfortran.fortran-torture/execute/entry_4.f90 gfortran.fortran-torture/execute/intrinsic_dotprod.f90 gfortran.fortran-torture/execute/intrinsic_matmul.f90 Can I check this fix into the master branch? 2021-09-06 Michael Meissner gcc/ * config/rs6000/rs6000.c (rs6000_emit_move_si_sf_subreg): Deal with SUBREGs of TImode and DImode. --- gcc/config/rs6000/rs6000.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index b9ebd56c993..7bbf29a3e1c 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -10942,6 +10942,16 @@ rs6000_emit_move_si_sf_subreg (rtx dest, rtx source, machine_mode mode) return true; } + /* In case we are given a SUBREG for a larger type, reduce it to + SImode. */ + if (mode == SFmode && GET_MODE_SIZE (inner_mode) > 4) + { + rtx tmp = gen_reg_rtx (SImode); + emit_move_insn (tmp, gen_lowpart (SImode, source)); + emit_insn (gen_movsf_from_si (dest, tmp)); + return true; + } + if (mode == SFmode && inner_mode == SImode) { emit_insn (gen_movsf_from_si (dest, inner_source)); -- 2.31.1 -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.ibm.com, phone: +1 (978) 899-4797