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From: Jakub Jelinek <jakub@redhat.com>
To: Hongtao Liu <crazylht@gmail.com>
Cc: Uros Bizjak <ubizjak@gmail.com>, GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH] i386: Fix up cond_{and,ior,xor,mul}* [PR104779]
Date: Mon, 7 Mar 2022 09:51:26 +0100	[thread overview]
Message-ID: <YiXHjmnN+HPIeYX3@tucnak> (raw)
In-Reply-To: <CAMZc-bygyw3GhQp37KaV5+RZUD3HnNd2aOpJT7eABR1_=c4kfA@mail.gmail.com>

On Mon, Mar 07, 2022 at 10:15:48AM +0800, Hongtao Liu wrote:
> > Note, the predicates on cond_fma* and other FMA variants look all wrong to
> > me, usually the fma instructions require nonimmediate_operand operands,
> > but the cond_* patterns use vector_operand.  Besides what this patch
> --------cut from predicate.md---------
> 1142; Return true when OP is operand acceptable for vector memory operand.
> 1143; Only AVX can have misaligned memory operand.
> 1144(define_predicate "vector_memory_operand"
> 1145  (and (match_operand 0 "memory_operand")
> 1146       (ior (match_test "TARGET_AVX")
> 1147            (match_test "MEM_ALIGN (op) >= GET_MODE_ALIGNMENT (mode)"))))
> 1148
> 1149; Return true when OP is register_operand or vector_memory_operand.
> 1150(define_predicate "vector_operand"
> 1151  (ior (match_operand 0 "register_operand")
> 1152       (match_operand 0 "vector_memory_operand")))
> --------cut end------------------------
> 
> vector_operand is a subset of nonimmediate_operands, so it's more like
> a potential optimization issue rather than a correctness one?

You're right.
And fma apparently doesn't use something like ix86_fixup_binary_operands*,
allows all 3 inputs as MEMs and only deals with it at RA time.

	Jakub


      reply	other threads:[~2022-03-07  8:51 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-05  8:05 Jakub Jelinek
2022-03-07  2:15 ` Hongtao Liu
2022-03-07  8:51   ` Jakub Jelinek [this message]

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