From: Michael Meissner <meissner@linux.ibm.com>
To: Michael Meissner <meissner@linux.ibm.com>,
gcc-patches@gcc.gnu.org,
Segher Boessenkool <segher@kernel.crashing.org>,
David Edelsohn <dje.gcc@gmail.com>,
Peter Bergner <bergner@linux.ibm.com>,
Will Schmidt <will_schmidt@vnet.ibm.com>
Subject: [PATCH 4/4] Allow vsx_extract_<mode> to use Altivec registers, PR target/99293
Date: Mon, 28 Mar 2022 12:28:55 -0400 [thread overview]
Message-ID: <YkHiR3hZQ2LCnEpE@toto.the-meissners.org> (raw)
In-Reply-To: <YkHhL5rL39UoKIHC@toto.the-meissners.org>
Allow vsx_extract_<mode> to use Altivec registers, PR target/99293
In looking at PR target/99293, I noticed that the vsx_extract_<mode>
pattern for V2DImode and V2DFmode only allowed traditional floating point
registers, and it did not allow Altivec registers. The original code was
written a few years ago when we used the old register allocator, and
support for scalar floating point in Altivec registers was just being
added to GCC.
I have built the spec 2017 benchmark suite With all 4 patches in this
series applied, and compared it to the build with the previous 3 patches
applied. In addition to the changes from the previous 3 patches, this
patch now changes the code for the following 3 benchmarks (2 floating
point, 1 integer):
bwaves_r, fotonik3d_r, xalancbmk_r
I have built bootstrap versions on the following systems. There were no
regressions in the runs:
Power9 little endian, --with-cpu=power9
Power10 little endian, --with-cpu=power10
Power8 big endian, --with-cpu=power8 (both 32-bit & 64-bit tests)
Can I install this into the trunk? After a burn-in period, can I backport
and install this into GCC 11 and GCC 10 branches?
2022-03-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
PR target/99293
* config/rs6000/rs6000.md (vsx_extract_<mode>): Allow destination
to be an Altivec register.
---
gcc/config/rs6000/vsx.md | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 2a23807c2dc..d30fd4f2596 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3397,15 +3397,12 @@ (define_expand "vsx_set_<mode>"
;; Optimize cases were we can do a simple or direct move.
;; Or see if we can avoid doing the move at all
-;; There are some unresolved problems with reload that show up if an Altivec
-;; register was picked. Limit the scalar value to FPRs for now.
-
(define_insn "vsx_extract_<mode>"
- [(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=d, d, wr, wr")
+ [(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=wa, wa, wr, wr")
(vec_select:<VS_scalar>
- (match_operand:VSX_D 1 "gpc_reg_operand" "wa, wa, wa, wa")
+ (match_operand:VSX_D 1 "gpc_reg_operand" "wa, wa, wa, wa")
(parallel
- [(match_operand:QI 2 "const_0_to_1_operand" "wD, n, wD, n")])))]
+ [(match_operand:QI 2 "const_0_to_1_operand" "wD, n, wD, n")])))]
"VECTOR_MEM_VSX_P (<MODE>mode)"
{
int element = INTVAL (operands[2]);
--
2.35.1
--
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com
next prev parent reply other threads:[~2022-03-28 16:29 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-28 16:24 [PATCH 0/4] Optimize vec_splats of vec_extract, " Michael Meissner
2022-03-28 16:26 ` [PATCH 1/4] Optimize vec_splats of constant vec_extract for V2DI/V2DF, PR target 99293 Michael Meissner
2022-03-28 17:14 ` Segher Boessenkool
2022-03-28 22:30 ` Michael Meissner
2022-03-28 23:25 ` Segher Boessenkool
2022-03-28 16:27 ` [PATCH 2/4] Make vsx_splat_<mode>_reg use correct insn attributes, PR target/99293 Michael Meissner
2022-03-28 20:28 ` Segher Boessenkool
2022-03-30 22:41 ` Michael Meissner
2022-04-01 17:21 ` Segher Boessenkool
2022-03-28 16:28 ` [PATCH 3/4] Make vsx_extract_<mode> use correct insn attributes, PR target 99293 Michael Meissner
2022-03-28 22:06 ` Segher Boessenkool
2022-03-30 22:58 ` Michael Meissner
2022-03-28 16:28 ` Michael Meissner [this message]
2022-03-28 23:59 ` [PATCH 4/4] Allow vsx_extract_<mode> to use Altivec registers, PR target/99293 Segher Boessenkool
2022-03-29 17:26 ` Michael Meissner
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