From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 086743858C2D for ; Wed, 30 Mar 2022 22:42:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 086743858C2D Received: from pps.filterd (m0187473.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 22UKS7QC027152; Wed, 30 Mar 2022 22:42:03 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 3f4we4b3x7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 30 Mar 2022 22:42:03 +0000 Received: from m0187473.ppops.net (m0187473.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.43/8.16.0.43) with SMTP id 22UMQclJ036459; Wed, 30 Mar 2022 22:42:03 GMT Received: from ppma02wdc.us.ibm.com (aa.5b.37a9.ip4.static.sl-reverse.com [169.55.91.170]) by mx0a-001b2d01.pphosted.com with ESMTP id 3f4we4b3wt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 30 Mar 2022 22:42:02 +0000 Received: from pps.filterd (ppma02wdc.us.ibm.com [127.0.0.1]) by ppma02wdc.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 22UMHiWb009937; Wed, 30 Mar 2022 22:42:01 GMT Received: from b01cxnp22034.gho.pok.ibm.com (b01cxnp22034.gho.pok.ibm.com [9.57.198.24]) by ppma02wdc.us.ibm.com with ESMTP id 3f1tf9ra9m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 30 Mar 2022 22:42:01 +0000 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 22UMg0aw55837100 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 30 Mar 2022 22:42:00 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D2B91B2065; Wed, 30 Mar 2022 22:42:00 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 947DCB2067; Wed, 30 Mar 2022 22:42:00 +0000 (GMT) Received: from toto.the-meissners.org (unknown [9.65.244.27]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTPS; Wed, 30 Mar 2022 22:42:00 +0000 (GMT) Date: Wed, 30 Mar 2022 18:41:59 -0400 From: Michael Meissner To: Segher Boessenkool Cc: Michael Meissner , gcc-patches@gcc.gnu.org, David Edelsohn , Peter Bergner , Will Schmidt Subject: Re: [PATCH 2/4] Make vsx_splat__reg use correct insn attributes, PR target/99293 Message-ID: Mail-Followup-To: Michael Meissner , Segher Boessenkool , gcc-patches@gcc.gnu.org, David Edelsohn , Peter Bergner , Will Schmidt References: <20220328202839.GN614@gate.crashing.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220328202839.GN614@gate.crashing.org> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 3694PdPljcRmrX_JX_2w5rqGM5omKi64 X-Proofpoint-GUID: 5AVtujr-_qzT4VHLHtbuPNxS-Yy_tdX7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-30_06,2022-03-30_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 mlxlogscore=918 priorityscore=1501 mlxscore=0 spamscore=0 malwarescore=0 clxscore=1015 impostorscore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2203300108 X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 30 Mar 2022 22:42:07 -0000 On Mon, Mar 28, 2022 at 03:28:39PM -0500, Segher Boessenkool wrote: > Hi! > > On Mon, Mar 28, 2022 at 12:27:05PM -0400, Michael Meissner wrote: > > In looking at PR target/99293, I noticed that the code in the insn > > vsx_splat__reg used "vecmove" as the "type" insn attribute when the > > "mtvsrdd" is generated. It should use "mfvsr". I also added a "p9v" isa > > attribute for that alternative. > > s/mfvsr/mtvsr/ > > But, mtvsrd and mtvsrdd have very different scheduling properties (like, > on p10 it is 1 cycle vs. 3 cycles). I must admit, I assumed vecmove was a stand-in for XXMR (i.e. XXLOR). Since its use is used for other cases (mtvsrdd, xxsel/vsel, x{s,v}abs*, x{s,v}nabs*, xsiexpq*), it is probably better to just let things lie, and perhaps relook at it in the GCC 13 time frame. > Also, there are two insn patterns for mtvsrdd, and you are only touching > one here. I think you meant that comment about the third patch (to vsx_extract_) and not to this patch (to vsx_splat__reg) where there are only two alternatives (the first being xxpermdi and the second being mtvsrdd). > > * config/rs6000/rs6000.md (vsx_splat__reg): Use the correct > > insn type attribute. Add "p9v" isa attribute for generating the > > mtvsrdd instruction. > > This is in vsx.md, instead. > > > --- a/gcc/config/rs6000/vsx.md > > +++ b/gcc/config/rs6000/vsx.md > > @@ -4580,7 +4580,8 @@ (define_insn "vsx_splat__reg" > > "@ > > xxpermdi %x0,%x1,%x1,0 > > mtvsrdd %x0,%1,%1" > > - [(set_attr "type" "vecperm,vecmove")]) > > + [(set_attr "type" "vecperm,mtvsr") > > + (set_attr "isa" "*,p9v")]) > > "we" requires "p9v". Please do a full conversion when getting rid of > this? That includes requiring TARGET_POWERPC64 for it (not -m64 as its > documentation says; the existing implementation of "we" is correct). That is more complex, and likely it should be a GCC 13 thing. Off the top of my head, we would need a new "isa" variant (p9v64) that combines p9v and 64-bit. Originally, I had changed the "we" to "wa", but then I realized it wouldn't work for 32-bit, but I left in setting the alternative. -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meissner@linux.ibm.com