From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id 988C43858418 for ; Sat, 2 Apr 2022 09:25:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 988C43858418 Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-599-R9kZijUnO0SiesdD3NUBfQ-1; Sat, 02 Apr 2022 05:25:19 -0400 X-MC-Unique: R9kZijUnO0SiesdD3NUBfQ-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.rdu2.redhat.com [10.11.54.2]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id F1376185A794; Sat, 2 Apr 2022 09:25:18 +0000 (UTC) Received: from tucnak.zalov.cz (unknown [10.39.194.220]) by smtp.corp.redhat.com (Postfix) with ESMTPS id AD79140E80E0; Sat, 2 Apr 2022 09:25:18 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.16.1/8.16.1) with ESMTPS id 2329PGlN2023627 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Sat, 2 Apr 2022 11:25:16 +0200 Received: (from jakub@localhost) by tucnak.zalov.cz (8.16.1/8.16.1/Submit) id 2329PF112023626; Sat, 2 Apr 2022 11:25:15 +0200 Date: Sat, 2 Apr 2022 11:25:15 +0200 From: Jakub Jelinek To: Uros Bizjak Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] i386: Fix up ix86_expand_vector_init_general [PR105123] Message-ID: Reply-To: Jakub Jelinek MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.11.54.2 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-Spam-Status: No, score=-3.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, KAM_SHORT, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 02 Apr 2022 09:25:22 -0000 Hi! The following testcase is miscompiled on ia32. The problem is that at -O0 we end up with: vector(4) short unsigned int _1; short unsigned int u.0_3; ... _1 = {u.0_3, u.0_3, u.0_3, u.0_3}; statement (dead) which is wrongly expanded. elt is (subreg:HI (reg:SI 83 [ u.0_3 ]) 0), tmp_mode SImode, so after convert_mode we start with word (reg:SI 83 [ u.0_3 ]). The intent is to manually broadcast that value to 2 SImode parts, but because we pass word as target to expand_simple_binop, it will overwrite (reg:SI 83 [ u.0_3 ]) and we end up with 0: 10: {r83:SI=r83:SI<<0x10;clobber flags:CC;} 11: {r83:SI=r83:SI|r83:SI;clobber flags:CC;} 12: {r83:SI=r83:SI<<0x10;clobber flags:CC;} 13: {r83:SI=r83:SI|r83:SI;clobber flags:CC;} 14: clobber r110:V4HI 15: r110:V4HI#0=r83:SI 16: r110:V4HI#4=r83:SI as the two ors do nothing and two shifts each by 16 left shift it all away. The following patch fixes that by using NULL_RTX target, so we expand it as 10: {r110:SI=r83:SI<<0x10;clobber flags:CC;} 11: {r111:SI=r110:SI|r83:SI;clobber flags:CC;} 12: {r112:SI=r83:SI<<0x10;clobber flags:CC;} 13: {r113:SI=r112:SI|r83:SI;clobber flags:CC;} 14: clobber r114:V4HI 15: r114:V4HI#0=r111:SI 16: r114:V4HI#4=r113:SI instead. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? Another possibility would be to pass NULL_RTX only when word == elt and word otherwise, where word would necessarily be a pseudo from the first shift after passing NULL_RTX there once or pass NULL_RTX for the shift and word for ior. 2022-04-02 Jakub Jelinek PR target/105123 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): Avoid using word as target for expand_simple_binop when doing ASHIFT and IOR. * gcc.target/i386/pr105123.c: New test. --- gcc/config/i386/i386-expand.cc.jj 2022-03-19 13:52:53.000000000 +0100 +++ gcc/config/i386/i386-expand.cc 2022-04-01 16:51:27.253154191 +0200 @@ -15830,9 +15830,9 @@ quarter: else { word = expand_simple_binop (tmp_mode, ASHIFT, word, shift, - word, 1, OPTAB_LIB_WIDEN); + NULL_RTX, 1, OPTAB_LIB_WIDEN); word = expand_simple_binop (tmp_mode, IOR, word, elt, - word, 1, OPTAB_LIB_WIDEN); + NULL_RTX, 1, OPTAB_LIB_WIDEN); } } --- gcc/testsuite/gcc.target/i386/pr105123.c.jj 2022-04-01 16:56:44.549625810 +0200 +++ gcc/testsuite/gcc.target/i386/pr105123.c 2022-04-01 16:56:33.569782511 +0200 @@ -0,0 +1,22 @@ +/* PR target/105123 */ +/* { dg-do run { target sse2_runtime } } */ +/* { dg-options "-msse2" } */ +/* { dg-additional-options "-mtune=i686" { target ia32 } } */ + +typedef unsigned short __attribute__((__vector_size__ (4 * sizeof (unsigned short)))) V; + +V +foo (unsigned short u, V v) +{ + return __builtin_shuffle (u * v, v); +} + +int +main () +{ + V x = foo (1, (V) { 0, 1, 2, 3 }); + for (unsigned i = 0; i < 4; i++) + if (x[i] != i) + __builtin_abort (); + return 0; +} Jakub