[PATCH] i386: Fix up V2DI and V1TI inequality comparisons [PR105613]

[PATCH] i386: Fix up V2DI and V1TI inequality comparisons [PR105613]

[Jakub Jelinek]

Hi!

The recent r13-458 change to introduce vec_cmpeqv1tiv1ti and
add TARGET_SSE2 support to vec_cmpeqv2div2di works nicely for
equality comparisons, but as the testcase shows doesn't work
for inequality comparisons.
For EQ if we perform comparison with twice as many half-sized elemenets,
the result should be ~0 when both halves are ~0 only (both halves need
to be equal for the whole to be equal), otherwise 0, so AND is the
correct operation for it.
But for NE, the result should be ~0 when either of the halves is ~0
(if either half is not equal, the whole is not equal) and so the right
operation for NE is IOR, not AND.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2022-05-17  Jakub Jelinek  <jakub@redhat.com>

	PR target/105613
	* config/i386/sse.md (vec_cmpeqv2div2di, vec_cmpeqv1tiv1ti): Use
	andv4si3 only for EQ, for NE use iorv4si3 instead.

	* gcc.c-torture/execute/pr105613.c: New test.

--- gcc/config/i386/sse.md.jj	2022-05-16 09:46:01.962065216 +0200
+++ gcc/config/i386/sse.md	2022-05-16 10:48:45.698038881 +0200
@@ -4407,7 +4407,10 @@ (define_expand "vec_cmpeqv2div2di"
       emit_insn (gen_sse2_pshufd (tmp1, ops[0], GEN_INT (0xb1)));
 
       rtx tmp2 = gen_reg_rtx (V4SImode);
-      emit_insn (gen_andv4si3 (tmp2, tmp1, ops[0]));
+      if (GET_CODE (operands[1]) == EQ)
+	emit_insn (gen_andv4si3 (tmp2, tmp1, ops[0]));
+      else
+	emit_insn (gen_iorv4si3 (tmp2, tmp1, ops[0]));
 
       emit_move_insn (operands[0], gen_lowpart (V2DImode, tmp2));
     }
@@ -4435,7 +4438,10 @@ (define_expand "vec_cmpeqv1tiv1ti"
   emit_insn (gen_sse2_pshufd (tmp1, tmp2, GEN_INT (0x4e)));
 
   rtx tmp3 = gen_reg_rtx (V4SImode);
-  emit_insn (gen_andv4si3 (tmp3, tmp2, tmp1));
+  if (GET_CODE (operands[1]) == EQ)
+    emit_insn (gen_andv4si3 (tmp3, tmp2, tmp1));
+  else
+    emit_insn (gen_iorv4si3 (tmp3, tmp2, tmp1));
 
   emit_move_insn (operands[0], gen_lowpart (V1TImode, tmp3));
   DONE;
--- gcc/testsuite/gcc.c-torture/execute/pr105613.c.jj	2022-05-16 10:42:34.286151601 +0200
+++ gcc/testsuite/gcc.c-torture/execute/pr105613.c	2022-05-16 10:48:07.687562119 +0200
@@ -0,0 +1,26 @@
+/* PR target/105613 */
+/* { dg-do run { target int128 } } */
+
+typedef unsigned __int128 __attribute__((__vector_size__ (16))) V;
+
+void
+foo (V v, V *r)
+{
+  *r = v != 0;
+}
+
+int
+main ()
+{
+  V r;
+  foo ((V) {5}, &r);
+  if (r[0] != ~(unsigned __int128) 0)
+    __builtin_abort ();
+  foo ((V) {0x500000005ULL}, &r);
+  if (r[0] != ~(unsigned __int128) 0)
+    __builtin_abort ();
+  foo ((V) {0}, &r);
+  if (r[0] != 0)
+    __builtin_abort ();
+  return 0;
+}

	Jakub

Re: [PATCH] i386: Fix up V2DI and V1TI inequality comparisons [PR105613]

[Uros Bizjak]

On Tue, May 17, 2022 at 9:00 AM Jakub Jelinek <jakub@redhat.com> wrote:
>
> Hi!
>
> The recent r13-458 change to introduce vec_cmpeqv1tiv1ti and
> add TARGET_SSE2 support to vec_cmpeqv2div2di works nicely for
> equality comparisons, but as the testcase shows doesn't work
> for inequality comparisons.
> For EQ if we perform comparison with twice as many half-sized elemenets,
> the result should be ~0 when both halves are ~0 only (both halves need
> to be equal for the whole to be equal), otherwise 0, so AND is the
> correct operation for it.
> But for NE, the result should be ~0 when either of the halves is ~0
> (if either half is not equal, the whole is not equal) and so the right
> operation for NE is IOR, not AND.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
> 2022-05-17  Jakub Jelinek  <jakub@redhat.com>
>
>         PR target/105613
>         * config/i386/sse.md (vec_cmpeqv2div2di, vec_cmpeqv1tiv1ti): Use
>         andv4si3 only for EQ, for NE use iorv4si3 instead.
>
>         * gcc.c-torture/execute/pr105613.c: New test.

OK.

Thanks,
Uros.

>
> --- gcc/config/i386/sse.md.jj   2022-05-16 09:46:01.962065216 +0200
> +++ gcc/config/i386/sse.md      2022-05-16 10:48:45.698038881 +0200
> @@ -4407,7 +4407,10 @@ (define_expand "vec_cmpeqv2div2di"
>        emit_insn (gen_sse2_pshufd (tmp1, ops[0], GEN_INT (0xb1)));
>
>        rtx tmp2 = gen_reg_rtx (V4SImode);
> -      emit_insn (gen_andv4si3 (tmp2, tmp1, ops[0]));
> +      if (GET_CODE (operands[1]) == EQ)
> +       emit_insn (gen_andv4si3 (tmp2, tmp1, ops[0]));
> +      else
> +       emit_insn (gen_iorv4si3 (tmp2, tmp1, ops[0]));
>
>        emit_move_insn (operands[0], gen_lowpart (V2DImode, tmp2));
>      }
> @@ -4435,7 +4438,10 @@ (define_expand "vec_cmpeqv1tiv1ti"
>    emit_insn (gen_sse2_pshufd (tmp1, tmp2, GEN_INT (0x4e)));
>
>    rtx tmp3 = gen_reg_rtx (V4SImode);
> -  emit_insn (gen_andv4si3 (tmp3, tmp2, tmp1));
> +  if (GET_CODE (operands[1]) == EQ)
> +    emit_insn (gen_andv4si3 (tmp3, tmp2, tmp1));
> +  else
> +    emit_insn (gen_iorv4si3 (tmp3, tmp2, tmp1));
>
>    emit_move_insn (operands[0], gen_lowpart (V1TImode, tmp3));
>    DONE;
> --- gcc/testsuite/gcc.c-torture/execute/pr105613.c.jj   2022-05-16 10:42:34.286151601 +0200
> +++ gcc/testsuite/gcc.c-torture/execute/pr105613.c      2022-05-16 10:48:07.687562119 +0200
> @@ -0,0 +1,26 @@
> +/* PR target/105613 */
> +/* { dg-do run { target int128 } } */
> +
> +typedef unsigned __int128 __attribute__((__vector_size__ (16))) V;
> +
> +void
> +foo (V v, V *r)
> +{
> +  *r = v != 0;
> +}
> +
> +int
> +main ()
> +{
> +  V r;
> +  foo ((V) {5}, &r);
> +  if (r[0] != ~(unsigned __int128) 0)
> +    __builtin_abort ();
> +  foo ((V) {0x500000005ULL}, &r);
> +  if (r[0] != ~(unsigned __int128) 0)
> +    __builtin_abort ();
> +  foo ((V) {0}, &r);
> +  if (r[0] != 0)
> +    __builtin_abort ();
> +  return 0;
> +}
>
>         Jakub
>