From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 0C539385829F for ; Thu, 28 Jul 2022 04:47:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0C539385829F Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 26S4hFXG032353; Thu, 28 Jul 2022 04:47:18 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0b-001b2d01.pphosted.com (PPS) with ESMTPS id 3hkkp302wg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 Jul 2022 04:47:18 +0000 Received: from m0098419.ppops.net (m0098419.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 26S4ilKD003861; Thu, 28 Jul 2022 04:47:17 GMT Received: from ppma02dal.us.ibm.com (a.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.10]) by mx0b-001b2d01.pphosted.com (PPS) with ESMTPS id 3hkkp302w8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 Jul 2022 04:47:17 +0000 Received: from pps.filterd (ppma02dal.us.ibm.com [127.0.0.1]) by ppma02dal.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 26S4LqJn018083; Thu, 28 Jul 2022 04:47:17 GMT Received: from b03cxnp07029.gho.boulder.ibm.com (b03cxnp07029.gho.boulder.ibm.com [9.17.130.16]) by ppma02dal.us.ibm.com with ESMTP id 3hhfpj18qk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 Jul 2022 04:47:17 +0000 Received: from b03ledav003.gho.boulder.ibm.com (b03ledav003.gho.boulder.ibm.com [9.17.130.234]) by b03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 26S4lFRV38076894 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 28 Jul 2022 04:47:15 GMT Received: from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7AF7B6A04D; Thu, 28 Jul 2022 04:47:15 +0000 (GMT) Received: from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DF5866A04F; Thu, 28 Jul 2022 04:47:14 +0000 (GMT) Received: from toto.the-meissners.org (unknown [9.65.225.181]) by b03ledav003.gho.boulder.ibm.com (Postfix) with ESMTPS; Thu, 28 Jul 2022 04:47:14 +0000 (GMT) Date: Thu, 28 Jul 2022 00:47:13 -0400 From: Michael Meissner To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt Subject: [PATCH 1/5] IEEE 128-bit built-in overload support. Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: HFSR94oV6b8u4fUZXibYO89HO8muriW9 X-Proofpoint-GUID: _ZcvwIVScm_MjOCO2bx3422Ycqo5qyDO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-27_08,2022-07-27_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 phishscore=0 priorityscore=1501 adultscore=0 mlxscore=0 mlxlogscore=999 malwarescore=0 impostorscore=0 bulkscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2206140000 definitions=main-2207280019 X-Spam-Status: No, score=-10.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_MANYTO, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 28 Jul 2022 04:47:20 -0000 [PATCH 1/5] IEEE 128-bit built-in overload support. This patch lays the ground work that future patches will use to add builtin support (both normal and overloaded) for the case where long double uses the IEEE 128-bit encoding. This adds a new stanza (ieee128-hw-ld) for when we have IEEE 128-bit hardware support and long double uses the IEEE 128-bit encoding. A new type attribute (ieeeld) is added for long double if long double uses the IEEE 128-bit encoding. I have tested these patches on a power10 that is running Fedora 36, which defaults to using long doubles that are IEEE 128-bit. I have built two parallel GCC compilers, one that defaults to using IEEE 128-bit long doubles and one that defaults to using IBM 128-bit long doubles. I have compared the test results to the original compiler results, comparing a modified GCC to the original compiler using an IEEE 128-bit long double default, and also comparing a modified GCC to the original compiler using an IBM 128-bit long double default. In both cases, the results are the same. I have also compared the compilers with the future patch in progress that does switch the internal type handling. Once those patches are installed, the overload mechanism will insure the correct built-in is used. Can I install this patch to the trunk? 2022-07-27 Michael Meissner gcc/ * config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add support for ibm128-hw-ld stanza. (rs6000_builtin_is_supported): Likewise. (rs6000_init_builtins): Likewise. (rs6000_expand_builtin): Add support for IEEE128_HW_LD. Add support for ieeeld. * config/rs6000/rs6000-builtins.def (toplevel): Add comment about the new ieeeld attribute. * config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add BSTZ_IEEE128_HW_LD. (stanza_map): Likewise. (enable_string): Likewise. (attrinfo): Add isieeeld. (parse_bif_attrs): Parse ieeeld. Add printing ieeeld to the debug print. (write_decls): Add support for ibm128-hw-ld stanza and ieeeld attribute. (write_bif_static_init): Add support for ieeeld attribute. --- gcc/config/rs6000/rs6000-builtin.cc | 18 ++++++++++++++++++ gcc/config/rs6000/rs6000-builtins.def | 1 + gcc/config/rs6000/rs6000-gen-builtins.cc | 18 ++++++++++++++++-- 3 files changed, 35 insertions(+), 2 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index 2819773d9f9..67e86bee781 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -123,6 +123,10 @@ rs6000_invalid_builtin (enum rs6000_gen_builtins fncode) case ENB_IEEE128_HW: error ("%qs requires quad-precision floating-point arithmetic", name); break; + case ENB_IEEE128_HW_LD: + error ("%qs requires %qs to use IEEE quad-precision floating-point " + "arithmetic", name, "long double"); + break; case ENB_DFP: error ("%qs requires the %qs option", name, "-mhard-dfp"); break; @@ -189,6 +193,8 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode) return TARGET_ALTIVEC && rs6000_cpu == PROCESSOR_CELL; case ENB_IEEE128_HW: return TARGET_FLOAT128_HW; + case ENB_IEEE128_HW_LD: + return TARGET_FLOAT128_HW && FLOAT128_IEEE_P (TFmode); case ENB_DFP: return TARGET_DFP; case ENB_CRYPTO: @@ -857,6 +863,9 @@ rs6000_init_builtins (void) continue; if (e == ENB_IEEE128_HW && !TARGET_FLOAT128_HW) continue; + if (e == ENB_IEEE128_HW_LD && (!TARGET_FLOAT128_HW + || !FLOAT128_IEEE_P (TFmode))) + continue; if (e == ENB_DFP && !TARGET_DFP) continue; if (e == ENB_CRYPTO && !TARGET_CRYPTO) @@ -3387,6 +3396,8 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, || (e == ENB_P9_64 && TARGET_MODULO && TARGET_POWERPC64) || (e == ENB_P9V && TARGET_P9_VECTOR) || (e == ENB_IEEE128_HW && TARGET_FLOAT128_HW) + || (e == ENB_IEEE128_HW_LD && TARGET_FLOAT128_HW + && FLOAT128_IEEE_P (TFmode)) || (e == ENB_DFP && TARGET_DFP) || (e == ENB_CRYPTO && TARGET_CRYPTO) || (e == ENB_HTM && TARGET_HTM) @@ -3426,6 +3437,13 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, return const0_rtx; } + if (bif_is_ieeeld (*bifaddr) && !FLOAT128_IEEE_P (TFmode)) + { + error ("%qs requires % to be IEEE 128-bit format", + bifaddr->bifname); + return const0_rtx; + } + if (bif_is_cpu (*bifaddr)) return cpu_expand_builtin (fcode, exp, target); diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index f76f54793d7..defd7e25ffe 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -139,6 +139,7 @@ ; endian Needs special handling for endianness ; ibmld Restrict usage to the case when TFmode is IBM-128 ; ibm128 Restrict usage to the case where __ibm128 is supported or if ibmld +; ieeeld Restrict usage to the case when TFmode is IEEE-128 ; ; Each attribute corresponds to extra processing required when ; the built-in is expanded. All such special processing should diff --git a/gcc/config/rs6000/rs6000-gen-builtins.cc b/gcc/config/rs6000/rs6000-gen-builtins.cc index 0bd7a535e5f..b939e04c258 100644 --- a/gcc/config/rs6000/rs6000-gen-builtins.cc +++ b/gcc/config/rs6000/rs6000-gen-builtins.cc @@ -95,6 +95,7 @@ along with GCC; see the file COPYING3. If not see ibmld Restrict usage to the case when TFmode is IBM-128 ibm128 Restrict usage to the case where __ibm128 is supported or if ibmld + ieeeld Restrict usage to the case when TFmode is IEEE-128 An example stanza might look like this: @@ -227,6 +228,7 @@ enum bif_stanza BSTZ_P9_64, BSTZ_P9V, BSTZ_IEEE128_HW, + BSTZ_IEEE128_HW_LD, BSTZ_DFP, BSTZ_CRYPTO, BSTZ_HTM, @@ -261,6 +263,7 @@ static stanza_entry stanza_map[NUMBIFSTANZAS] = { "power9-64", BSTZ_P9_64 }, { "power9-vector", BSTZ_P9V }, { "ieee128-hw", BSTZ_IEEE128_HW }, + { "ieee128-hw-ld", BSTZ_IEEE128_HW_LD }, { "dfp", BSTZ_DFP }, { "crypto", BSTZ_CRYPTO }, { "htm", BSTZ_HTM }, @@ -286,6 +289,7 @@ static const char *enable_string[NUMBIFSTANZAS] = "ENB_P9_64", "ENB_P9V", "ENB_IEEE128_HW", + "ENB_IEEE128_HW_LD", "ENB_DFP", "ENB_CRYPTO", "ENB_HTM", @@ -395,6 +399,7 @@ struct attrinfo bool isendian; bool isibmld; bool isibm128; + bool isieeeld; }; /* Fields associated with a function prototype (bif or overload). */ @@ -1444,6 +1449,8 @@ parse_bif_attrs (attrinfo *attrptr) attrptr->isibmld = 1; else if (!strcmp (attrname, "ibm128")) attrptr->isibm128 = 1; + else if (!strcmp (attrname, "ieeeld")) + attrptr->isieeeld = 1; else { diag (oldpos, "unknown attribute.\n"); @@ -1477,7 +1484,8 @@ parse_bif_attrs (attrinfo *attrptr) "ldvec = %d, stvec = %d, reve = %d, pred = %d, htm = %d, " "htmspr = %d, htmcr = %d, mma = %d, quad = %d, pair = %d, " "mmaint = %d, no32bit = %d, 32bit = %d, cpu = %d, ldstmask = %d, " - "lxvrse = %d, lxvrze = %d, endian = %d, ibmdld = %d, ibm128 = %d.\n", + "lxvrse = %d, lxvrze = %d, endian = %d, ibmdld = %d, ibm128 = %d, " + "ieeeld = %d.\n", attrptr->isinit, attrptr->isset, attrptr->isextract, attrptr->isnosoft, attrptr->isldvec, attrptr->isstvec, attrptr->isreve, attrptr->ispred, attrptr->ishtm, attrptr->ishtmspr, @@ -1485,7 +1493,7 @@ parse_bif_attrs (attrinfo *attrptr) attrptr->ismmaint, attrptr->isno32bit, attrptr->is32bit, attrptr->iscpu, attrptr->isldstmask, attrptr->islxvrse, attrptr->islxvrze, attrptr->isendian, attrptr->isibmld, - attrptr->isibm128); + attrptr->isibm128, attrptr->isieeeld); #endif return PC_OK; @@ -2252,6 +2260,7 @@ write_decls (void) fprintf (header_file, " ENB_P9_64,\n"); fprintf (header_file, " ENB_P9V,\n"); fprintf (header_file, " ENB_IEEE128_HW,\n"); + fprintf (header_file, " ENB_IEEE128_HW_LD,\n"); fprintf (header_file, " ENB_DFP,\n"); fprintf (header_file, " ENB_CRYPTO,\n"); fprintf (header_file, " ENB_HTM,\n"); @@ -2301,6 +2310,7 @@ write_decls (void) fprintf (header_file, "#define bif_endian_bit\t\t(0x00200000)\n"); fprintf (header_file, "#define bif_ibmld_bit\t\t(0x00400000)\n"); fprintf (header_file, "#define bif_ibm128_bit\t\t(0x00800000)\n"); + fprintf (header_file, "#define bif_ieeeld_bit\t\t(0x01000000)\n"); fprintf (header_file, "\n"); fprintf (header_file, "#define bif_is_init(x)\t\t((x).bifattrs & bif_init_bit)\n"); @@ -2350,6 +2360,8 @@ write_decls (void) "#define bif_is_ibmld(x)\t((x).bifattrs & bif_ibmld_bit)\n"); fprintf (header_file, "#define bif_is_ibm128(x)\t((x).bifattrs & bif_ibm128_bit)\n"); + fprintf (header_file, + "#define bif_is_ieeeld(x)\t((x).bifattrs & bif_ieeeld_bit)\n"); fprintf (header_file, "\n"); fprintf (header_file, @@ -2548,6 +2560,8 @@ write_bif_static_init (void) fprintf (init_file, " | bif_ibmld_bit"); if (bifp->attrs.isibm128) fprintf (init_file, " | bif_ibm128_bit"); + if (bifp->attrs.isieeeld) + fprintf (init_file, " | bif_ieeeld_bit"); fprintf (init_file, ",\n"); fprintf (init_file, " /* restr_opnd */\t{%d, %d, %d},\n", bifp->proto.restr_opnd[0], bifp->proto.restr_opnd[1], -- 2.35.3 -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meissner@linux.ibm.com