From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id B5178387688D for ; Fri, 24 Mar 2023 23:09:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B5178387688D Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32OM0gFO002107; Fri, 24 Mar 2023 23:09:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=date : from : to : cc : subject : message-id : references : mime-version : content-type : in-reply-to; s=pp1; bh=CQpAt7AZT0AEKE9IPHPI2FSf7y1EDoFAzzFaoo4D88I=; b=nzFTN5qaK9NZffZRwdsGnwhvs3vIUCSqR2NRk5KK3deKsZEycZ4EXU5Qr8L/8RKxWWtt VT3srl+rXaxJ/8Kx+KQsfWFqj9qul/Byh2EULw7ux0Cn9LrErlGAoEanMwJ4euDaF8V8 cBY/NeMLXnUCHCIO3T1UyEs9GTiRj5T/gUn14wGYxzB/i+UVQdompa4fCYnBF3rVG9tQ hGS23K+rsgj2+J6oBhNVahpCzeHJJzOFu3FqvwYlrINwj5VjEULglI50N38A3tfSQaLK aih/V+gl367SHj3qJwt8hneDmhla/6ULD0AwcWr8/fKNKTqhiA3H/hvTAaZizS7005db 2A== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3phm9h9402-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); 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Fri, 24 Mar 2023 23:09:19 GMT Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B90A758067; Fri, 24 Mar 2023 23:09:19 +0000 (GMT) Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 39EF558056; Fri, 24 Mar 2023 23:09:19 +0000 (GMT) Received: from toto.the-meissners.org (unknown [9.160.30.200]) by smtpav05.dal12v.mail.ibm.com (Postfix) with ESMTPS; Fri, 24 Mar 2023 23:09:19 +0000 (GMT) Date: Fri, 24 Mar 2023 19:09:17 -0400 From: Michael Meissner To: "Kewen.Lin" Cc: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn , Peter Bergner , Will Schmidt Subject: Re: [PATCH] PR target/105325, Make load/cmp fusion know about prefixed loads Message-ID: Mail-Followup-To: Michael Meissner , "Kewen.Lin" , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn , Peter Bergner , Will Schmidt References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-GUID: PbWtAbwtUdDfd5T-AE3MsZu8upZWb5Q3 X-Proofpoint-ORIG-GUID: esfrP4QlDjTv4SGEX6FIUCN1IlbLQOMj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-24_11,2023-03-24_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxscore=0 malwarescore=0 suspectscore=0 impostorscore=0 priorityscore=1501 mlxlogscore=999 adultscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303240176 X-Spam-Status: No, score=-10.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, Mar 23, 2023 at 04:10:22PM +0800, Kewen.Lin wrote: > Hi Mike, > > Thanks for fixing this, some minor comments are inlined below. > > on 2023/3/22 07:53, Michael Meissner wrote: > > The issue with the bug is the power10 load GPR + cmpi -1/0/1 fusion > > optimization generates illegal assembler code. > > > > Ultimately the code was dying because the fusion load + compare -1/0/1 patterns > > did not handle the possibility that the load might be prefixed. > > > > The main cause is the constraints for the individual loads in the fusion did not > > match the machine. In particular, LWA is a ds format instruction when it is > > unprefixed. The code did not also set the prefixed attribute correctly. > > > > This patch rewrites the genfusion.pl script so that it will have more accurate > > constraints for the LWA and LD instructions (which are DS instructions). The > > updated genfusion.pl was then run to update fusion.md. Finally, the code for > > the "prefixed" attribute is modified so that it considers load + compare > > immediate patterns to be like the normal load insns in checking whether > > operand[1] is a prefixed instruction. > > > > I have tested this patch on a little endian power10 system, on a little endian > > power9 system, and a big endian power8 system (both -m32 and -m64 tested on > > BE). There were no regressions, can I check this into the trunk? > > > > The same patch applies to the gcc-12 and gcc-11 branches. Can I check this > > patch into those branches also after a burn-in period? > > > > 2023-03-21 Michael Meissner > > Aaron Sawdey > > > > gcc/ > > > > PR target/105325 > > * gcc/config/rs6000/genfusion.pl (gen_ld_cmpi_p10): Improve generation > > of the ld and lwa instructions which use the DS encoding instead of D. > > Use the YZ constraint for these loads. Handle prefixed loads better. > > Set the sign_extend attribute as appropriate. > > * gcc/config/rs6000/fusion.md: Regenerate. > > * gcc/config/rs6000/rs6000.md (prefixed attribute): Add fused_load_cmpi > > instructions to the list of instructions that might have a prefixed load > > instruction. > > > > gcc/testsuite/ > > > > PR target/105325 > > * g++.target/powerpc/pr105325.C: New test. > > * gcc.target/powerpc/fusion-p10-ldcmpi.c: Adjust insn counts. > > --- > > gcc/config/rs6000/genfusion.pl | 26 ++++++++++++++++--- > > gcc/config/rs6000/fusion.md | 17 +++++++----- > > gcc/config/rs6000/rs6000.md | 2 +- > > gcc/testsuite/g++.target/powerpc/pr105325.C | 24 +++++++++++++++++ > > .../gcc.target/powerpc/fusion-p10-ldcmpi.c | 4 +-- > > 5 files changed, 59 insertions(+), 14 deletions(-) > > create mode 100644 gcc/testsuite/g++.target/powerpc/pr105325.C > > > > diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl > > index e4db352e0ce..4f367cadc52 100755 > > --- a/gcc/config/rs6000/genfusion.pl > > +++ b/gcc/config/rs6000/genfusion.pl > > @@ -56,7 +56,7 @@ sub mode_to_ldst_char > > sub gen_ld_cmpi_p10 > > { > > my ($lmode, $ldst, $clobbermode, $result, $cmpl, $echr, $constpred, > > - $mempred, $ccmode, $np, $extend, $resultmode); > > + $mempred, $ccmode, $np, $extend, $resultmode, $constraint); > > LMODE: foreach $lmode ('DI','SI','HI','QI') { > > $ldst = mode_to_ldst_char($lmode); > > $clobbermode = $lmode; > > @@ -71,21 +71,34 @@ sub gen_ld_cmpi_p10 > > CCMODE: foreach $ccmode ('CC','CCUNS') { > > $np = "NON_PREFIXED_D"; > > $mempred = "non_update_memory_operand"; > > + $constraint = "m"; > > The three assignments on $np $mempred $constraint can be moved > to place (a) (see below) and add one explicit assignment for > $constraint at place (b), since for the condition ccmode eq 'CC', > HI/SI/DI have their own settings (btw QI is skipped), these > assignments for default value can be moved to else arm (for CCUNS). ... > we have broken it into two different arms for SI and DI, this > comment can be removed? ... > > ... and this comment. > I have fixed these issues and reposted the patch as: | Date: Fri, 24 Mar 2023 19:06:35 -0400 | From: Michael Meissner | Subject: [PATCH, V2] PR target/105325, Make load/cmp fusion know about prefixed load | Message-ID: -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meissner@linux.ibm.com