From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 8B3B33858D32 for ; Fri, 29 Sep 2023 18:09:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8B3B33858D32 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0353726.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38THgXJG019789; Fri, 29 Sep 2023 18:09:18 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=date : from : to : subject : message-id : mime-version : content-type; s=pp1; bh=zyIjwXbWnPKoew4yec8qwuDDlm50c26IrZJkmSMJIZ4=; b=XeX9LlkIt1qEzEWGM6M5NVFljuq45CGiQHRXJUXd3PT/BNoq73ZvxEJC9atw9sVNpZ12 au0VU+JGigUzBq0SvXV2zqmh6tGT7yebuPSFu07eBd/GSQLVZpar9RILxCylUj77XB6E KBdJqAV6SZFXhBiFWBc+XKqeP6hF+ce9iZnkTduDu5Xha5VOTucg0ro4U1QimUhDTC8C twHoqZl3t9IFISIby8JVPX6DxvEK2nz6ImSSKpaKBhSqlD6WY782M0zzN3nynZPHt1ou pejshHa8bDO04eI9WbTm4/MV7P0VA2vsbpYnG3BY3SC6vtT9LXqHQmB/e+RWVO06Y++q aw== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3te21daa2g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 18:09:17 +0000 Received: from m0353726.ppops.net (m0353726.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 38THgxMC021043; Fri, 29 Sep 2023 18:09:17 GMT Received: from ppma23.wdc07v.mail.ibm.com (5d.69.3da9.ip4.static.sl-reverse.com [169.61.105.93]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3te21daa1s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 18:09:17 +0000 Received: from pps.filterd (ppma23.wdc07v.mail.ibm.com [127.0.0.1]) by ppma23.wdc07v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 38THe1BU010995; Fri, 29 Sep 2023 18:09:15 GMT Received: from smtprelay05.dal12v.mail.ibm.com ([172.16.1.7]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 3tabum6eqs-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 18:09:15 +0000 Received: from smtpav01.dal12v.mail.ibm.com (smtpav01.dal12v.mail.ibm.com [10.241.53.100]) by smtprelay05.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 38TI9ENH66585018 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 29 Sep 2023 18:09:14 GMT Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A135958058; Fri, 29 Sep 2023 18:09:14 +0000 (GMT) Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3977C58057; Fri, 29 Sep 2023 18:09:14 +0000 (GMT) Received: from cowardly-lion.the-meissners.org (unknown [9.61.180.52]) by smtpav01.dal12v.mail.ibm.com (Postfix) with ESMTPS; Fri, 29 Sep 2023 18:09:14 +0000 (GMT) Date: Fri, 29 Sep 2023 14:09:12 -0400 From: Michael Meissner To: gcc-patches@gcc.gnu.org, Michael Meissner , Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner Subject: [PATCH] Cleanup: Replace UNSPEC_COPYSIGN with copysign RTL Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-TM-AS-GCONF: 00 X-Proofpoint-GUID: zzin2lJT3gyEmx5jfIhzIPgWGuSzRJyY X-Proofpoint-ORIG-GUID: wrKsIdeOsaFqTJIhVR1BD0Pzj1rdLfdh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-29_16,2023-09-28_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 lowpriorityscore=0 mlxscore=0 malwarescore=0 suspectscore=0 mlxlogscore=796 spamscore=0 clxscore=1011 bulkscore=0 priorityscore=1501 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309290156 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: When I first implemented COPYSIGN support in the power7 days, we did not have a copysign RTL insn, so I had to use UNSPEC to represent the copysign instruction. This patch removes those UNSPECs, and it uses the native RTL copysign insn. I have tested this on both big endian and little endian PowerPC server systems, and there were no regressions. Can I check this into the master branch? Since it is just a clean-up, I don't see the need to back port it, but it is simple to do the back port if desired. 2023-09-29 Michael Meissner gcc/ * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete. (copysign3_fcpsg): Use copysign RTL instead of UNSPEC. (copysign3_hard): Likewise. (copysign3_soft): Likewise. * config/rs6000/vector.md (vector_copysign3): Use copysign RTL instead of UNSPEC. * config/rs6000/vsx.md (vsx_copysign3): Use copysign RTL instead of UNSPEC. --- gcc/config/rs6000/rs6000.md | 20 ++++++++------------ gcc/config/rs6000/vector.md | 4 ++-- gcc/config/rs6000/vsx.md | 7 +++---- 3 files changed, 13 insertions(+), 18 deletions(-) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 7b583d7a69a..1b6b6cb5bbe 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -108,7 +108,6 @@ (define_c_enum "unspec" UNSPEC_TOCREL UNSPEC_MACHOPIC_OFFSET UNSPEC_BPERM - UNSPEC_COPYSIGN UNSPEC_PARITY UNSPEC_CMPB UNSPEC_FCTIW @@ -5383,9 +5382,8 @@ (define_expand "copysign3" ;; compiler from optimizing -0.0 (define_insn "copysign3_fcpsgn" [(set (match_operand:SFDF 0 "gpc_reg_operand" "=d,wa") - (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "d,wa") - (match_operand:SFDF 2 "gpc_reg_operand" "d,wa")] - UNSPEC_COPYSIGN))] + (copysign:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "d,wa") + (match_operand:SFDF 2 "gpc_reg_operand" "d,wa")))] "TARGET_HARD_FLOAT && (TARGET_CMPB || VECTOR_UNIT_VSX_P (mode))" "@ fcpsgn %0,%2,%1 @@ -14984,10 +14982,9 @@ (define_expand "copysign3" (define_insn "copysign3_hard" [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v") - (unspec:IEEE128 - [(match_operand:IEEE128 1 "altivec_register_operand" "v") - (match_operand:IEEE128 2 "altivec_register_operand" "v")] - UNSPEC_COPYSIGN))] + (copysign:IEEE128 + (match_operand:IEEE128 1 "altivec_register_operand" "v") + (match_operand:IEEE128 2 "altivec_register_operand" "v")))] "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (mode)" "xscpsgnqp %0,%2,%1" [(set_attr "type" "vecmove") @@ -14995,10 +14992,9 @@ (define_insn "copysign3_hard" (define_insn "copysign3_soft" [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v") - (unspec:IEEE128 - [(match_operand:IEEE128 1 "altivec_register_operand" "v") - (match_operand:IEEE128 2 "altivec_register_operand" "v")] - UNSPEC_COPYSIGN)) + (copysign:IEEE128 + (match_operand:IEEE128 1 "altivec_register_operand" "v") + (match_operand:IEEE128 2 "altivec_register_operand" "v"))) (clobber (match_scratch:IEEE128 3 "=&v"))] "!TARGET_FLOAT128_HW && FLOAT128_IEEE_P (mode)" "xscpsgndp %x3,%x2,%x1\;xxpermdi %x0,%x3,%x1,1" diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md index 1ae04c8e0a8..f4fc620b653 100644 --- a/gcc/config/rs6000/vector.md +++ b/gcc/config/rs6000/vector.md @@ -332,8 +332,8 @@ (define_expand "vector_btrunc2" (define_expand "vector_copysign3" [(set (match_operand:VEC_F 0 "vfloat_operand") - (unspec:VEC_F [(match_operand:VEC_F 1 "vfloat_operand") - (match_operand:VEC_F 2 "vfloat_operand")] UNSPEC_COPYSIGN))] + (copysign:VEC_F (match_operand:VEC_F 1 "vfloat_operand") + (match_operand:VEC_F 2 "vfloat_operand")))] "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" { if (mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (mode)) diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 4de41e78d51..f3b40229094 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -2233,10 +2233,9 @@ (define_insn "*vsx_ge__p" ;; Copy sign (define_insn "vsx_copysign3" [(set (match_operand:VSX_F 0 "vsx_register_operand" "=wa") - (unspec:VSX_F - [(match_operand:VSX_F 1 "vsx_register_operand" "wa") - (match_operand:VSX_F 2 "vsx_register_operand" "wa")] - UNSPEC_COPYSIGN))] + (copysign:VSX_F + (match_operand:VSX_F 1 "vsx_register_operand" "wa") + (match_operand:VSX_F 2 "vsx_register_operand" "wa")))] "VECTOR_UNIT_VSX_P (mode)" "xvcpsgnp %x0,%x2,%x1" [(set_attr "type" "")]) -- 2.41.0 -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meissner@linux.ibm.com