From: Michael Meissner <meissner@linux.ibm.com>
To: Michael Meissner <meissner@linux.ibm.com>,
gcc-patches@gcc.gnu.org,
Segher Boessenkool <segher@kernel.crashing.org>,
"Kewen.Lin" <linkw@linux.ibm.com>,
David Edelsohn <dje.gcc@gmail.com>,
Peter Bergner <bergner@linux.ibm.com>
Subject: [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.
Date: Wed, 18 Oct 2023 20:00:18 -0400 [thread overview]
Message-ID: <ZTBxkkoelVIxvnEy@cowardly-lion.the-meissners.org> (raw)
In-Reply-To: <ZTBwes3Kzi/k2/WR@cowardly-lion.the-meissners.org>
This patch re-enables generating load and store vector pair instructions when
doing certain memory copy operations when -mcpu=future is used.
During power10 development, it was determined that using store vector pair
instructions were problematical in a few cases, so we disabled generating load
and store vector pair instructions for memory options by default. This patch
re-enables generating these instructions if -mcpu=future is used.
The patches have been tested on both little and big endian systems. Can I check
it into the master branch?
2023-10-18 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): Add
-mblock-ops-vector-pair.
(POWERPC_MASKS): Likewise.
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index a6d9d7bf9a8..849af6b3ac8 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -90,6 +90,7 @@
/* Flags for a potential future processor that may or may not be delivered. */
#define ISA_FUTURE_MASKS (ISA_3_1_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-power9-vector. */
@@ -127,6 +128,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
--
2.41.0
--
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com
next prev parent reply other threads:[~2023-10-19 0:01 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-18 23:55 [PATCH 0/6] PowerPC Future patches Michael Meissner
2023-10-18 23:58 ` [PATCH 1/6] PowerPC: Add -mcpu=future option Michael Meissner
2023-10-25 20:15 ` Ping: " Michael Meissner
2023-11-03 7:49 ` Ping #2: " Michael Meissner
2023-10-19 0:00 ` Michael Meissner [this message]
2023-10-25 20:16 ` Ping: [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair Michael Meissner
2023-11-03 7:50 ` Ping #2: " Michael Meissner
2023-10-19 0:01 ` [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers Michael Meissner
2023-10-25 20:18 ` Ping: " Michael Meissner
2023-11-03 7:51 ` Ping #2: " Michael Meissner
2023-10-19 0:03 ` [PATCH 4/6] PowerPC: Make MMA insns support " Michael Meissner
2023-10-25 20:19 ` Ping: " Michael Meissner
2023-10-19 0:04 ` [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations Michael Meissner
2023-10-25 20:20 ` Ping: " Michael Meissner
2023-11-03 7:52 ` Ping #2: " Michael Meissner
2023-10-19 0:06 ` [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers Michael Meissner
2023-10-25 20:21 ` Ping: " Michael Meissner
2023-11-03 7:53 ` Ping #2: " Michael Meissner
-- strict thread matches above, loose matches on Subject: below --
2022-11-10 2:43 [PATCH 0/6] PowerPC Dense Math prelimary support (-mcpu=future) Michael Meissner
2022-11-10 2:45 ` [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair Michael Meissner
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