From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id D130D3858D37 for ; Tue, 14 Nov 2023 12:07:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D130D3858D37 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org D130D3858D37 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699963623; cv=none; b=nimsWQPJSAEEVmZ7F+WeQc5J0c9CW8dx+51yNEJCwMusbAYT4kD94arlyDu6iC0yaPpwGbXLcxcXFPNhYJ3nxk0t0imluxVhlzIjQFOd4MhA0vkLMRFbt9a3Jh3UiMYmPOL1NMY7HDu60AdR+YzNH+/+lU+DjKD+rRcUnhMLVLw= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699963623; c=relaxed/simple; bh=ooKp7SMOrgO7SBPZbZr1qwngOpQBMu6++dPyJCQc5p4=; h=DKIM-Signature:Date:From:To:Subject:Message-ID:MIME-Version; b=K5BS+yV3/zs8QbTOvDPnaFFQCTk+kQwKrx/u3DWtXHVstuXAcGTjjQKVX6iCLU/TbsKhqFaCSM5sS2q2tlR5L/g0iFiAeRF9w0Kc6OyGFwY3phDAT3/4kEwCxIF8OUoZ3ASmukckYEE5ugKDIwfn5TPYcrihoB+++4Zxz6DRWco= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1699963621; h=from:from:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type:in-reply-to:in-reply-to: references:references; bh=5clKYWetwe67kjQCNF6MHv92NISzUSZ66MTlB+ohmu4=; b=Ed2TeRaKnqbJcnyjnzmTOKzmjLG5TK2d5lAiJSpvrYnUl0i5/MKGEdQrSqHv6xEnD5Y12S EOGsLY3++9cJshyfj4lXbMzdB+UshiWHd6mdEyAgAP4O0uoUjjljQoZMkPxEN/VghZ1bGk 3FxeGq8Bfm7X+kKSdL+ktGmb495aic8= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-151-AVXsJguoPJeqRi6STWz9uw-1; Tue, 14 Nov 2023 07:07:00 -0500 X-MC-Unique: AVXsJguoPJeqRi6STWz9uw-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id AE83F29AA3A5; Tue, 14 Nov 2023 12:06:59 +0000 (UTC) Received: from tucnak.zalov.cz (unknown [10.39.194.53]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 64F245028; Tue, 14 Nov 2023 12:06:59 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.17.1/8.17.1) with ESMTPS id 3AEC6usn1907370 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Tue, 14 Nov 2023 13:06:57 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.17.1/8.17.1/Submit) id 3AEC6tLJ1907369; Tue, 14 Nov 2023 13:06:55 +0100 Date: Tue, 14 Nov 2023 13:06:55 +0100 From: Jakub Jelinek To: Uros Bizjak , Roger Sayle Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] i386: Fix up 3_doubleword_lowpart [PR112523] Message-ID: Reply-To: Jakub Jelinek References: <00d701da15ab$b8971170$29c53450$@nextmovesoftware.com> MIME-Version: 1.0 In-Reply-To: <00d701da15ab$b8971170$29c53450$@nextmovesoftware.com> X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi! On Sun, Nov 12, 2023 at 09:03:42PM -0000, Roger Sayle wrote: > This patch improves register pressure during reload, inspired by PR 97756. > Normally, a double-word right-shift by a constant produces a double-word > result, the highpart of which is dead when followed by a truncation. > The dead code calculating the high part gets cleaned up post-reload, so > the issue isn't normally visible, except for the increased register > pressure during reload, sometimes leading to odd register assignments. > Providing a post-reload splitter, which clobbers a single wordmode > result register instead of a doubleword result register, helps (a bit). Unfortunately this broke bootstrap on i686-linux, broke all ACATS tests on x86_64-linux as well as miscompiled e.g. __floattisf in libgcc there as well. The bug is that shrd{l,q} instruction expects the low part of the input to be the same register as the output, rather than the high part as the patch implemented. split_double_mode (mode, &operands[1], 1, &operands[1], &operands[3]); sets operands[1] to the lo_half and operands[3] to the hi_half, so if operands[0] is not the same register as operands[1] (rather than [3]) after RA, we should during splitting move operands[1] into operands[0]. Your testcase: > #define MASK60 ((1ul << 60) - 1) > unsigned long foo (__uint128_t n) > { > unsigned long a = n & MASK60; > unsigned long b = (n >> 60); > b = b & MASK60; > unsigned long c = (n >> 120); > return a+b+c; > } still has the same number of instructions. Bootstrapped/regtested on x86_64-linux (where it e.g. turns === acats Summary === -# of unexpected failures 2328 +# of expected passes 2328 +# of unexpected failures 0 and fixes gcc.dg/torture/fp-int-convert-*timode.c FAILs as well) and i686-linux (where it previously didn't bootstrap, but compared to Friday evening's bootstrap the testresults are ok), ok for trunk? 2023-11-14 Jakub Jelinek PR target/112523 PR ada/112514 * config/i386/i386.md (3_doubleword_lowpart): Move operands[1] aka low part of input rather than operands[3] aka high part of input to output if not the same register. --- gcc/config/i386/i386.md.jj 2023-11-14 08:10:18.932549803 +0100 +++ gcc/config/i386/i386.md 2023-11-14 09:31:05.565019207 +0100 @@ -14825,8 +14825,8 @@ (define_insn_and_split "3_dou { split_double_mode (mode, &operands[1], 1, &operands[1], &operands[3]); operands[4] = GEN_INT (( * BITS_PER_UNIT) - INTVAL (operands[2])); - if (!rtx_equal_p (operands[0], operands[3])) - emit_move_insn (operands[0], operands[3]); + if (!rtx_equal_p (operands[0], operands[1])) + emit_move_insn (operands[0], operands[1]); }) (define_insn "x86_64_shrd" Jakub