From: Alex Coplan <alex.coplan@arm.com>
To: gcc-patches@gcc.gnu.org
Cc: Richard Sandiford <richard.sandiford@arm.com>
Subject: [PATCH 2/2] aarch64: Handle autoinc addresses in ld1rq splitter [PR112906]
Date: Wed, 13 Dec 2023 21:02:52 +0000 [thread overview]
Message-ID: <ZXob/Cn/URXcaNVP@arm.com> (raw)
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This patch uses the new force_reload_address routine added by the
previous patch to fix PR112906.
Bootstrapped/regtested on aarch64-linux-gnu, OK for trunk?
Thanks,
Alex
gcc/ChangeLog:
PR target/112906
* config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
Use force_reload_address to reload addresses that aren't suitable for
ld1rq in the pre-RA splitter.
gcc/testsuite/ChangeLog:
PR target/112906
* gcc.target/aarch64/sve/acle/general/pr112906.c: New test.
[-- Attachment #2: pr112906-02.txt --]
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diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index fdd14d15096..319bc01cae9 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -2690,10 +2690,7 @@ (define_insn_and_split "@aarch64_vec_duplicate_vq<mode>_le"
{
if (can_create_pseudo_p ()
&& !aarch64_sve_ld1rq_operand (operands[1], <V128>mode))
- {
- rtx addr = force_reg (Pmode, XEXP (operands[1], 0));
- operands[1] = replace_equiv_address (operands[1], addr);
- }
+ operands[1] = force_reload_address (operands[1]);
if (GET_CODE (operands[2]) == SCRATCH)
operands[2] = gen_reg_rtx (VNx16BImode);
emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr112906.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr112906.c
new file mode 100644
index 00000000000..69b653f1a71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr112906.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-O2" } */
+#include <arm_sve.h>
+unsigned c;
+long d;
+void f() {
+ unsigned char *b;
+ svbool_t x = svptrue_b8();
+ svuint32_t g;
+ svuint8_t h, i;
+ d = 0;
+ for (; (unsigned *)d < &c; d += 16) {
+ h = svld1rq(x, &b[d]);
+ g = svdot_lane(g, i, h, 3);
+ }
+ svst1_vnum(x, &c, 8, g);
+}
next reply other threads:[~2023-12-13 21:03 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-13 21:02 Alex Coplan [this message]
2023-12-13 23:34 ` Richard Sandiford
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