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Tue, 6 Feb 2024 06:01:54 GMT Received: from smtpav01.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7610358059; Tue, 6 Feb 2024 06:01:54 +0000 (GMT) Received: from smtpav01.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BA57E58065; Tue, 6 Feb 2024 06:01:53 +0000 (GMT) Received: from cowardly-lion.the-meissners.org (unknown [9.61.187.161]) by smtpav01.wdc07v.mail.ibm.com (Postfix) with ESMTPS; Tue, 6 Feb 2024 06:01:53 +0000 (GMT) Date: Tue, 6 Feb 2024 01:01:52 -0500 From: Michael Meissner To: "Kewen.Lin" Cc: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn , Peter Bergner Subject: Re: Repost [PATCH 1/6] Add -mcpu=future Message-ID: Mail-Followup-To: Michael Meissner , "Kewen.Lin" , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn , Peter Bergner References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Hr9NluldpuqVsM4Jl_hv710RQl4KEKD4 X-Proofpoint-ORIG-GUID: pMB9fJ2q3B0Ijk2E0VO_rT3xmAIs5fWf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-05_18,2024-01-31_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 malwarescore=0 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 bulkscore=0 phishscore=0 impostorscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402060040 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, Jan 23, 2024 at 04:44:32PM +0800, Kewen.Lin wrote: > > --- a/gcc/config/rs6000/rs6000-cpus.def > > +++ b/gcc/config/rs6000/rs6000-cpus.def > > @@ -88,6 +88,10 @@ > > | OPTION_MASK_POWER10 \ > > | OTHER_POWER10_MASKS) > > > > +/* Flags for a potential future processor that may or may not be delivered. */ > > +#define ISA_FUTURE_MASKS (ISA_3_1_MASKS_SERVER \ > > + | OPTION_MASK_FUTURE) > > + > > Nit: Named as "ISA_FUTURE_MASKS_SERVER" seems more accurate as it's constituted > with ISA_3_1_MASKS_**SERVER** ... Well the _SERVER stuff was due to the power7 days when we still had to support the E500 in the main rs6000 tree. But I will change it to be more consistant in the future patches. > ..., then this need to be updated accordingly. > > > diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h > > index 33fd0efc936..25890ae3034 100644 > > --- a/gcc/config/rs6000/rs6000-opts.h > > +++ b/gcc/config/rs6000/rs6000-opts.h > > @@ -67,7 +67,9 @@ enum processor_type > > PROCESSOR_MPCCORE, > > PROCESSOR_CELL, > > PROCESSOR_PPCA2, > > - PROCESSOR_TITAN > > + PROCESSOR_TITAN, > > + > > Nit: unintentional empty line? > > > + PROCESSOR_FUTURE > > }; It was more as a separation. The MPCCORE, CELL, PPCA2, and TITAN are rather old processors. I don't recall why we kept them after the POWER. Logically we should re-order the list and move MPCCORE, etc. earlier, but I will delete the blank line in future patches. > > +static int > > +rs600_cpu_index_lookup (enum processor_type processor) > > s/rs600_cpu_index_lookup/rs6000_cpu_index_lookup/ I'm going to redo it, and eliminate rs600_cpu_index_lookup. Thanks for catching the spelling of rs600 instead of rs6000. > > +{ > > + for (size_t i = 0; i < ARRAY_SIZE (processor_target_table); i++) > > + if (processor_target_table[i].processor == processor) > > + return i; > > + > > + return -1; > > +} > > Nit: Since this is given with a valid enum processor_type, I think it should > never return -1? If so, may be more clear with gcc_unreachable () or adjust > with initial -1, break when hits and assert it's not -1. As I said, in looking at it, I think I will rewrite the code that uses it to call rs6000_cpu_name_lookup instead. > > + > > > > /* Return number of consecutive hard regs needed starting at reg REGNO > > to hold something of mode MODE. > > @@ -3756,23 +3768,45 @@ rs6000_option_override_internal (bool global_init_p) > > rs6000_isa_flags &= ~OPTION_MASK_POWERPC64; > > #endif > > > > + /* At the moment, we don't have explict -mtune=future support. If the user > > Nit: s/explict/explicit/ Thanks. > > > + explicitly tried to use -mtune=future, give a warning. If not, use the > > Nit: s/tried/tries/? Thanks. I will reword the comment. > > + power10 tuning until future tuning is added. */ > > if (rs6000_tune_index >= 0) > > - tune_index = rs6000_tune_index; > > + { > > + enum processor_type cur_proc > > + = processor_target_table[rs6000_tune_index].processor; > > + > > + if (cur_proc == PROCESSOR_FUTURE) > > + { > > + static bool issued_future_tune_warning = false; > > + if (!issued_future_tune_warning) > > + { > > + issued_future_tune_warning = true; > > This seems to ensure we only warn this once, but I noticed that in rs6000/ > only some OPT_Wpsabi related warnings adopt this way, I wonder if we don't > restrict it like this, for a tiny simple case, how many times it would warn? In a simple case, you would only get the warning once. But if you use __attribute__((__target__(...))) or #pragma target ... you might see it more than once. > > + warning (0, "%qs is not currently supported", "-mtune=future"); > > + } > > +> + rs6000_tune_index = rs600_cpu_index_lookup (PROCESSOR_POWER10); > > + } > > + tune_index = rs6000_tune_index; > > + } > > else if (cpu_index >= 0) > > - rs6000_tune_index = tune_index = cpu_index; > > + { > > + enum processor_type cur_cpu > > + = processor_target_table[cpu_index].processor; > > + > > + rs6000_tune_index = tune_index > > + = (cur_cpu == PROCESSOR_FUTURE > > + ? rs600_cpu_index_lookup (PROCESSOR_POWER10) > > s/rs600_cpu_index_lookup/rs6000_cpu_index_lookup/ See above. > > + : cpu_index); > > + } > > else > > { > > - size_t i; > > enum processor_type tune_proc > > = (TARGET_POWERPC64 ? PROCESSOR_DEFAULT64 : PROCESSOR_DEFAULT); > > > > - tune_index = -1; > > - for (i = 0; i < ARRAY_SIZE (processor_target_table); i++) > > - if (processor_target_table[i].processor == tune_proc) > > - { > > - tune_index = i; > > - break; > > - } > > + tune_index = rs600_cpu_index_lookup (tune_proc == PROCESSOR_FUTURE > > + ? PROCESSOR_POWER10 > > + : tune_proc); > > This part looks useless, as tune_proc is impossible to be PROCESSOR_FUTURE. Well in theory, you could configure the compiler with --with-cpu=future or --with-tune=future. > > } > > Maybe re-structure the above into: > > bool explicit_tune = false; > if (rs6000_tune_index >= 0) > { > tune_index = rs6000_tune_index; > explicit_tune = true; > } > else if (cpu_index >= 0) > // as before > rs6000_tune_index = tune_index = cpu_index; > else > { > //as before > ... > } > > // Check tune_index here instead. > > if (processor_target_table[tune_index].processor == PROCESSOR_FUTURE) > { > tune_index = rs6000_cpu_index_lookup (PROCESSOR_POWER10); > if (explicit_tune) > warn ... > } > > // as before > rs6000_tune = processor_target_table[tune_index].processor; > > > > > if (cpu_index >= 0) > > @@ -4785,6 +4819,7 @@ rs6000_option_override_internal (bool global_init_p) > > break; > > > > case PROCESSOR_POWER10: > > + case PROCESSOR_FUTURE: > > rs6000_cost = &power10_cost; > > break; > > > > @@ -5944,6 +5979,8 @@ rs6000_machine_from_flags (void) > > /* Disable the flags that should never influence the .machine selection. */ > > flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL); > > > > + if ((flags & (ISA_FUTURE_MASKS & ~ISA_3_1_MASKS_SERVER)) != 0) > > + return "future"; > > if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0) > > return "power10"; > > if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0) > > @@ -24500,6 +24537,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] = > > { "float128-hardware", OPTION_MASK_FLOAT128_HW, false, true }, > > { "fprnd", OPTION_MASK_FPRND, false, true }, > > { "power10", OPTION_MASK_POWER10, false, true }, > > + { "future", OPTION_MASK_FUTURE, false, true }, > > { "hard-dfp", OPTION_MASK_DFP, false, true }, > > { "htm", OPTION_MASK_HTM, false, true }, > > { "isel", OPTION_MASK_ISEL, false, true }, > > diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h > > index 2291fe8d3a3..43209f9a6e7 100644 > > --- a/gcc/config/rs6000/rs6000.h > > +++ b/gcc/config/rs6000/rs6000.h > > @@ -163,6 +163,7 @@ > > mcpu=e5500: -me5500; \ > > mcpu=e6500: -me6500; \ > > mcpu=titan: -mtitan; \ > > + mcpu=future: -mfuture; \ > > !mcpu*: %{mpower9-vector: -mpower9; \ > > mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \ > > mvsx: -mpower7; \ > > I think we should also update asm_names in driver-rs6000.cc. Ok. Though the driver-rs6000.cc stuff won't kick in until we have a real system that matches "future". -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meissner@linux.ibm.com