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Message-ID: Mail-Followup-To: Michael Meissner , "Kewen.Lin" , Segher Boessenkool , David Edelsohn , gcc-patches@gcc.gnu.org, Peter Bergner References: <1235feaf-ecea-b18d-ce83-ec30eb842dfb@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1235feaf-ecea-b18d-ce83-ec30eb842dfb@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: -O1k60uwp8y49UAOQ4dZBtL3HeDcXETe X-Proofpoint-GUID: Sld49e6_y9HFujssiDJm8xfFqIt1vZL4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-07_09,2024-02-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 phishscore=0 adultscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 suspectscore=0 mlxscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402080000 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, Feb 07, 2024 at 05:38:46PM +0800, Kewen.Lin wrote: > >>> -(define_insn_and_split "*movxo" > >>> +(define_insn_and_split "*movxo_nodm" > >>> [(set (match_operand:XO 0 "nonimmediate_operand" "=d,ZwO,d") > >>> (match_operand:XO 1 "input_operand" "ZwO,d,d"))] > >>> - "TARGET_MMA > >>> + "TARGET_MMA && !TARGET_DENSE_MATH > >>> && (gpc_reg_operand (operands[0], XOmode) > >>> || gpc_reg_operand (operands[1], XOmode))" > >>> "@ > >>> @@ -366,6 +369,31 @@ (define_insn_and_split "*movxo" > >>> (set_attr "length" "*,*,16") > >>> (set_attr "max_prefixed_insns" "2,2,*")]) > >>> > >>> +(define_insn_and_split "*movxo_dm" > >>> + [(set (match_operand:XO 0 "nonimmediate_operand" "=wa,QwO,wa,wD,wD,wa") > >>> + (match_operand:XO 1 "input_operand" "QwO,wa, wa,wa,wD,wD"))] > >> > >> Why not adopt ZwO rather than QwO? > > > > You have to split the address into 2 addresses for loading or storing vector > > pairs (or 4 addresses for loading or storing vectors). Z would allow > > register+register addresses, and you wouldn't be able to create the second > > address by adding 128 to it. Hence it uses 'Q' for register only and 'wo' for > > d-form addresses. > > Thanks for clarifying. But without this patch the define_insn_and_split *movxo > adopts "ZwO", IMHO it would mean the current "*movxo" define_insn_and_split have > been problematic? I thought adjust_address can ensure the new address would be > still valid after adjusting 128 offset, could you double check? Well it is more of a theoretical bug. Using 'Z' is wrong as I said because after register allocation you can't split an x-form (register+register) address. Using 'Q' would not allow reg+reg but would allow reg, which can be split because the 2nd address will be a d-form (reg+offset). But in practice, it won't be an issue since rs6000_setup_reg_addr_masks won't allow reg+reg addresses for TDOmode. > >>> #ifdef TARGET_REGNAMES > >>> @@ -1250,6 +1255,8 @@ static const char alt_reg_names[][8] = > >>> "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", > >>> /* vrsave vscr sfp */ > >>> "vrsave", "vscr", "sfp", > >>> + /* DMRs */ > >>> + "%dmr0", "%dmr1", "%dmr2", "%dmr3", "%dmr4", "%dmr5", "%dmr6", "%dmr7", > >> > >> Should be without "r" here, as tested gas doesn't recognize %dmr0 but it does > >> recognize %dm0. > > I guessed some reply was missing on this part (and some latter others)? Just want > to ensure something wasn't missing and hope this helps. :) I missed this on the first round of comments, but if gas doesn't like %dmr2 we should use %dm2. Thanks for catching this. -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meissner@linux.ibm.com